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From:   Maxime Ripard <maxime@cerno.tech>
To:     Maxime Ripard <mripard@kernel.org>,
        Ben Skeggs <bskeggs@redhat.com>,
        David Airlie <airlied@linux.ie>, Chen-Yu Tsai <wens@csie.org>,
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        Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
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        Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
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        Emma Anholt <emma@anholt.net>, Daniel Vetter <daniel@ffwll.ch>,
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Cc:     Maxime Ripard <maxime@cerno.tech>,
        Hans de Goede <hdegoede@redhat.com>,
        linux-arm-kernel@lists.infradead.org,
        Phil Elwell <phil@raspberrypi.com>,
        intel-gfx@lists.freedesktop.org,
        Dave Stevenson <dave.stevenson@raspberrypi.com>,
        dri-devel@lists.freedesktop.org, Dom Cobley <dom@raspberrypi.com>,
        linux-kernel@vger.kernel.org, nouveau@lists.freedesktop.org,
        linux-sunxi@lists.linux.dev,
        Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>,
        Geert Uytterhoeven <geert@linux-m68k.org>
Subject: [PATCH v2 26/41] drm/vc4: vec: Refactor VEC TV mode setting
Date:   Mon, 29 Aug 2022 15:11:40 +0200
Message-Id: <20220728-rpi-analog-tv-properties-v2-26-459522d653a7@cerno.tech>
In-Reply-To: <20220728-rpi-analog-tv-properties-v2-0-459522d653a7@cerno.tech>
References: <20220728-rpi-analog-tv-properties-v2-0-459522d653a7@cerno.tech>
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From: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>=0D
=0D
Change the mode_set function pointer logic to declarative config0,=0D
config1 and custom_freq fields, to make TV mode setting logic more=0D
concise and uniform.=0D
=0D
Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>=0D
Signed-off-by: Maxime Ripard <maxime@cerno.tech>=0D
=0D
diff --git a/drivers/gpu/drm/vc4/vc4_vec.c b/drivers/gpu/drm/vc4/vc4_vec.c=
=0D
index 72eee0cbb615..9a37c3fcc295 100644=0D
--- a/drivers/gpu/drm/vc4/vc4_vec.c=0D
+++ b/drivers/gpu/drm/vc4/vc4_vec.c=0D
@@ -194,7 +194,9 @@ enum vc4_vec_tv_mode_id {=0D
 =0D
 struct vc4_vec_tv_mode {=0D
 	const struct drm_display_mode *mode;=0D
-	void (*mode_set)(struct vc4_vec *vec);=0D
+	u32 config0;=0D
+	u32 config1;=0D
+	u32 custom_freq;=0D
 };=0D
 =0D
 static const struct debugfs_reg32 vec_regs[] =3D {=0D
@@ -224,34 +226,6 @@ static const struct debugfs_reg32 vec_regs[] =3D {=0D
 	VC4_REG32(VEC_DAC_MISC),=0D
 };=0D
 =0D
-static void vc4_vec_ntsc_mode_set(struct vc4_vec *vec)=0D
-{=0D
-	struct drm_device *drm =3D vec->connector.dev;=0D
-	int idx;=0D
-=0D
-	if (!drm_dev_enter(drm, &idx))=0D
-		return;=0D
-=0D
-	VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN);=0D
-	VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS);=0D
-=0D
-	drm_dev_exit(idx);=0D
-}=0D
-=0D
-static void vc4_vec_ntsc_j_mode_set(struct vc4_vec *vec)=0D
-{=0D
-	struct drm_device *drm =3D vec->connector.dev;=0D
-	int idx;=0D
-=0D
-	if (!drm_dev_enter(drm, &idx))=0D
-		return;=0D
-=0D
-	VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_NTSC_STD);=0D
-	VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS);=0D
-=0D
-	drm_dev_exit(idx);=0D
-}=0D
-=0D
 static const struct drm_display_mode ntsc_mode =3D {=0D
 	DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 13500,=0D
 		 720, 720 + 14, 720 + 14 + 64, 720 + 14 + 64 + 60, 0,=0D
@@ -259,37 +233,6 @@ static const struct drm_display_mode ntsc_mode =3D {=0D
 		 DRM_MODE_FLAG_INTERLACE)=0D
 };=0D
 =0D
-static void vc4_vec_pal_mode_set(struct vc4_vec *vec)=0D
-{=0D
-	struct drm_device *drm =3D vec->connector.dev;=0D
-	int idx;=0D
-=0D
-	if (!drm_dev_enter(drm, &idx))=0D
-		return;=0D
-=0D
-	VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_PAL_BDGHI_STD);=0D
-	VEC_WRITE(VEC_CONFIG1, VEC_CONFIG1_C_CVBS_CVBS);=0D
-=0D
-	drm_dev_exit(idx);=0D
-}=0D
-=0D
-static void vc4_vec_pal_m_mode_set(struct vc4_vec *vec)=0D
-{=0D
-	struct drm_device *drm =3D vec->connector.dev;=0D
-	int idx;=0D
-=0D
-	if (!drm_dev_enter(drm, &idx))=0D
-		return;=0D
-=0D
-	VEC_WRITE(VEC_CONFIG0, VEC_CONFIG0_PAL_BDGHI_STD);=0D
-	VEC_WRITE(VEC_CONFIG1,=0D
-		  VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ);=0D
-	VEC_WRITE(VEC_FREQ3_2, 0x223b);=0D
-	VEC_WRITE(VEC_FREQ1_0, 0x61d1);=0D
-=0D
-	drm_dev_exit(idx);=0D
-}=0D
-=0D
 static const struct drm_display_mode pal_mode =3D {=0D
 	DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 13500,=0D
 		 720, 720 + 20, 720 + 20 + 64, 720 + 20 + 64 + 60, 0,=0D
@@ -300,19 +243,24 @@ static const struct drm_display_mode pal_mode =3D {=0D
 static const struct vc4_vec_tv_mode vc4_vec_tv_modes[] =3D {=0D
 	[VC4_VEC_TV_MODE_NTSC] =3D {=0D
 		.mode =3D &ntsc_mode,=0D
-		.mode_set =3D vc4_vec_ntsc_mode_set,=0D
+		.config0 =3D VEC_CONFIG0_NTSC_STD | VEC_CONFIG0_PDEN,=0D
+		.config1 =3D VEC_CONFIG1_C_CVBS_CVBS,=0D
 	},=0D
 	[VC4_VEC_TV_MODE_NTSC_J] =3D {=0D
 		.mode =3D &ntsc_mode,=0D
-		.mode_set =3D vc4_vec_ntsc_j_mode_set,=0D
+		.config0 =3D VEC_CONFIG0_NTSC_STD,=0D
+		.config1 =3D VEC_CONFIG1_C_CVBS_CVBS,=0D
 	},=0D
 	[VC4_VEC_TV_MODE_PAL] =3D {=0D
 		.mode =3D &pal_mode,=0D
-		.mode_set =3D vc4_vec_pal_mode_set,=0D
+		.config0 =3D VEC_CONFIG0_PAL_BDGHI_STD,=0D
+		.config1 =3D VEC_CONFIG1_C_CVBS_CVBS,=0D
 	},=0D
 	[VC4_VEC_TV_MODE_PAL_M] =3D {=0D
 		.mode =3D &pal_mode,=0D
-		.mode_set =3D vc4_vec_pal_m_mode_set,=0D
+		.config0 =3D VEC_CONFIG0_PAL_BDGHI_STD,=0D
+		.config1 =3D VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ,=0D
+		.custom_freq =3D 0x223b61d1,=0D
 	},=0D
 };=0D
 =0D
@@ -470,7 +418,16 @@ static void vc4_vec_encoder_enable(struct drm_encoder =
*encoder,=0D
 	/* Mask all interrupts. */=0D
 	VEC_WRITE(VEC_MASK0, 0);=0D
 =0D
-	vec->tv_mode->mode_set(vec);=0D
+	VEC_WRITE(VEC_CONFIG0, vec->tv_mode->config0);=0D
+	VEC_WRITE(VEC_CONFIG1, vec->tv_mode->config1);=0D
+=0D
+	if (vec->tv_mode->custom_freq !=3D 0) {=0D
+		VEC_WRITE(VEC_FREQ3_2,=0D
+			  (vec->tv_mode->custom_freq >> 16) &=0D
+			  0xffff);=0D
+		VEC_WRITE(VEC_FREQ1_0,=0D
+			  vec->tv_mode->custom_freq & 0xffff);=0D
+	}=0D
 =0D
 	VEC_WRITE(VEC_DAC_MISC,=0D
 		  VEC_DAC_MISC_VID_ACT | VEC_DAC_MISC_DAC_RST_N);=0D
=0D
-- =0D
b4 0.10.0-dev-65ba7=0D