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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CY5PR11MB6365.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a80ec91b-89fa-43af-7212-08da8a4d39f6 X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Aug 2022 06:02:31.5586 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: uNh263C2XAOY1xvf22YP8bhkmss06FtyoMoyTS19g8SHn9Ovjg1nNLFyJDGpC6pxv4meJRfKznRg43gUAiLe0g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR11MB1858 X-OriginatorOrg: intel.com X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tuesday, August 30, 2022 1:34 AM, Sean Christopherson wrote: > On Mon, Aug 29, 2022, Wang, Wei W wrote: > > On Thursday, August 25, 2022 4:56 PM, Xiaoyao Li wrote: > > #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD) > diff > > --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index > > d7f8331d6f7e..195debc1bff1 100644 > > --- a/arch/x86/kvm/vmx/vmx.c > > +++ b/arch/x86/kvm/vmx/vmx.c > > @@ -1125,37 +1125,29 @@ static inline void pt_save_msr(struct pt_ctx > > *ctx, u32 addr_range) > > > > static void pt_guest_enter(struct vcpu_vmx *vmx) { > > - if (vmx_pt_mode_is_system()) > > + struct perf_event *event; > > + > > + if (vmx_pt_mode_is_system() || > > + !(vmx->pt_desc.guest.ctl & RTIT_CTL_TRACEEN)) >=20 > I don't think the host should trace the guest in the host/guest mode just > because the guest isn't tracing itself. I.e. the host still needs to tur= n off it's > own tracing. Right, need to fix this one. > This is effectively what I suggested[*], the main difference being that m= y > version adds dedicated enter/exit helpers so that perf can skip save/rest= ore of > the other MSRs. =20 What "other MSRs" were you referring to? (I suppose you meant perf_event_disable needs to save more MSRs) > It's easy to extend if perf needs to hand back an event to > complete the "exit. >=20 > bool guest_trace_enabled =3D vmx->pt_desc.guest.ctl & > RTIT_CTL_TRACEEN; >=20 > vmx->pt_desc.host_event =3D intel_pt_guest_enter(guest_trace_enabled); >=20 >=20 > and then on exit >=20 > bool guest_trace_enabled =3D vmx->pt_desc.guest.ctl & > RTIT_CTL_TRACEEN; >=20 > intel_pt_guest_exit(vmx->pt_desc.host_event, guest_trace_enabled); >=20 > [*] https://lore.kernel.org/all/YwecducnM%2FU6tqJT@google.com Yes, this can function. But I feel it a bit violates the general rule that I got from previous experiences: KVM should be a user of the perf subsystem, instead of implementing a secon= dary driver beyond perf's management. Being a user of perf means everything possible should go through "perf even= t", which is the interface that perf exposes to users.