Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Message-ID: <dbbef6f3-cf47-a921-fd89-e940af3e2f85@linaro.org>
Date:   Tue, 30 Aug 2022 09:23:04 +0300
MIME-Version: 1.0
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101
 Thunderbird/91.13.0
Subject: Re: [PATCH v2 2/3] dt-bindings: pci: QCOM Adding sc7280 aggre0,
 aggre1 clocks
Content-Language: en-US
To:     Krishna Chaitanya Chundru <quic_krichai@quicinc.com>,
        helgaas@kernel.org
Cc:     linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
        linux-kernel@vger.kernel.org, mka@chromium.org,
        quic_vbadigan@quicinc.com, quic_hemantk@quicinc.com,
        quic_nitegupt@quicinc.com, quic_skananth@quicinc.com,
        quic_ramkri@quicinc.com, manivannan.sadhasivam@linaro.org,
        swboyd@chromium.org, dmitry.baryshkov@linaro.org,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Stanimir Varbanov <svarbanov@mm-sol.com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>
References: <1656062391-14567-1-git-send-email-quic_krichai@quicinc.com>
 <1656691899-21315-1-git-send-email-quic_krichai@quicinc.com>
 <1656691899-21315-3-git-send-email-quic_krichai@quicinc.com>
 <1fb5f0c6-ff72-b9ba-175a-b5197ed658a7@linaro.org>
 <9de4c3a0-eb95-f4e9-b828-2343241fff41@quicinc.com>
 <75f8b257-7e0a-d871-ab30-37a72f7da56e@linaro.org>
 <3dd98ae4-8b19-e241-3b64-fe24509d2cb4@quicinc.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <3dd98ae4-8b19-e241-3b64-fe24509d2cb4@quicinc.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Precedence: bulk

On 29/08/2022 20:45, Krishna Chaitanya Chundru wrote:
> Sorry for very late reply.
> 
> If we increase the common definitions of clocks properties to "13" it is 
> sufficient right.
> 
> 
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml 
> b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index 92402f1..c9e268d 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -53,11 +53,11 @@ properties:
>     # Platform constraints are described later.
>     clocks:
>       minItems: 3
> -    maxItems: 12
> +    maxItems: 13
> 
>     clock-names:
>       minItems: 3
> -    maxItems: 12
> +    maxItems: 13
> 

Yes.

Best regards,
Krzysztof