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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id u6-20020a5d4346000000b0020fff0ea0a3sm8757749wrr.116.2022.08.29.23.46.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Aug 2022 23:46:42 -0700 (PDT) References: <20220805085716.5635-1-yu.tu@amlogic.com> <20220805085716.5635-4-yu.tu@amlogic.com> <1jiln0yzgj.fsf@starbuckisacylon.baylibre.com> <4e3cdd6b-5861-8a4f-1df7-af763f77bad5@amlogic.com> <1jsflftm1y.fsf@starbuckisacylon.baylibre.com> <0c7e6d90-2ce3-25ab-84b6-026ce8a238a8@amlogic.com> User-agent: mu4e 1.8.7; emacs 28.1 From: Jerome Brunet To: Yu Tu , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Neil Armstrong , Kevin Hilman , Michael Turquette , Stephen Boyd , Krzysztof Kozlowski , Martin Blumenstingl Subject: Re: [PATCH V3 3/6] clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver Date: Tue, 30 Aug 2022 08:44:01 +0200 In-reply-to: <0c7e6d90-2ce3-25ab-84b6-026ce8a238a8@amlogic.com> Message-ID: <1jtu5uz0ry.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 Content-Type: text/plain; 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