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From:   <Conor.Dooley@microchip.com>
To:     <zong.li@sifive.com>
CC:     <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
        <palmer@dabbelt.com>, <paul.walmsley@sifive.com>,
        <aou@eecs.berkeley.edu>, <greentime.hu@sifive.com>,
        <devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/3] soc: sifive: l2 cache: Rename SiFive L2 cache to
 composible cache.
Thread-Topic: [PATCH 2/3] soc: sifive: l2 cache: Rename SiFive L2 cache to
 composible cache.
Thread-Index: AQHYu2+0mRQQ5mCpPkuQboDoEF5AOK3FdGUAgAAawACAAZKDgA==
Date:   Tue, 30 Aug 2022 08:41:32 +0000
Message-ID: <e155125d-6a8a-aa28-b331-9c36d21305a5@microchip.com>
References: <20220829062202.3287-1-zong.li@sifive.com>
 <20220829062202.3287-3-zong.li@sifive.com>
 <1a0da77e-8b26-a6aa-4af2-bf852470230a@microchip.com>
 <CANXhq0rHnsRP=Djin53Nc5n3aYY-=ALu7=F-1Y+-U3_L_ehG6g@mail.gmail.com>
In-Reply-To: <CANXhq0rHnsRP=Djin53Nc5n3aYY-=ALu7=F-1Y+-U3_L_ehG6g@mail.gmail.com>
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