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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id x19-20020a9d6293000000b00616dfd2c859sm7579226otk.59.2022.08.30.11.03.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Aug 2022 11:03:42 -0700 (PDT) Received: (nullmailer pid 1769934 invoked by uid 1000); Tue, 30 Aug 2022 18:03:41 -0000 Date: Tue, 30 Aug 2022 13:03:41 -0500 From: Rob Herring To: Conor Dooley Cc: Guo Ren , Rob Herring , linux-kernel@vger.kernel.org, Conor Dooley , Palmer Dabbelt , Thomas Gleixner , Jessica Clarke , Andrew Jones , Paul Walmsley , Daniel Lezcano , qemu-riscv@nongnu.org, Anup Patel , Albert Ou , Krzysztof Kozlowski , Marc Zyngier , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Sagar Kadam Subject: Re: [PATCH v4 3/4] dt-bindings: riscv: add new riscv,isa strings for emulators Message-ID: <20220830180341.GA1769896-robh@kernel.org> References: <20220823183319.3314940-1-mail@conchuod.ie> <20220823183319.3314940-4-mail@conchuod.ie> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220823183319.3314940-4-mail@conchuod.ie> X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 23 Aug 2022 19:33:19 +0100, Conor Dooley wrote: > From: Conor Dooley > > The QEMU virt and spike machines currently export a riscv,isa string of > "rv64imafdcsuh", > > While the RISC-V foundation has been ratifying a bunch of extenstions > etc, the kernel has remained relatively static with what hardware is > supported - but the same is not true of QEMU. Using the virt machine > and running dt-validate on the dumped dtb fails, partly due to the > unexpected isa string. > > Rather than enumerate the many many possbilities, change the pattern > to a regex, with the following assumptions: > - ima are required > - the single letter order is fixed & we don't care about things that > can't even do "ima" > - the standard multi letter extensions are all in a "_z" format > where the first letter of is a valid single letter extension > - _s & _h are used for supervisor and hyper visor extensions > - convention says that after the first two chars, a standard multi > letter extension name could be an english word (ifencei anyone?) so > it's not worth restricting the charset > - as the above is just convention, don't apply any charset restrictions > to reduce future churn > - vendor ISA extensions begind with _x and have no charset restrictions > - we don't care about an e extension from an OS pov > - that attempting to validate the contents of the multiletter extensions > with dt-validate beyond the formatting is a futile, massively verbose > or unwieldy exercise at best > > The following limitations also apply: > - multi letter extension ordering is not enforced. dt-schema does not > appear to allow for named match groups, so the resulting regex would > be even more of a headache > - ditto for the numbered extensions > > Finally, add me as a maintainer of the binding so that when it breaks > in the future, I can be held responsible! > > Reported-by: Rob Herring > Link: https://lore.kernel.org/linux-riscv/20220803170552.GA2250266-robh@kernel.org/ > Reviewed-by: Andrew Jones > Acked-by: Guo Ren > Signed-off-by: Conor Dooley > --- > Palmer, feel free to drop the maintainer addition. I just mostly want > to clean up my own mess on this when they decide to ratify more > extensions & this comes back up again. > --- > Documentation/devicetree/bindings/riscv/cpus.yaml | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > Reviewed-by: Rob Herring