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Message-ID: <c8236663-055c-d6da-64ed-ae3f7fb2e690@linaro.org>
Date:   Tue, 30 Aug 2022 20:14:52 +0300
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Subject: Re: [PATCH net-next v2 5/5] dt-bindings: net: altera: tse: add an
 optional pcs register range
Content-Language: en-US
To:     Maxime Chevallier <maxime.chevallier@bootlin.com>,
        davem@davemloft.net, Rob Herring <robh+dt@kernel.org>
Cc:     netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
        thomas.petazzoni@bootlin.com, Andrew Lunn <andrew@lunn.ch>,
        Jakub Kicinski <kuba@kernel.org>,
        Eric Dumazet <edumazet@google.com>,
        Paolo Abeni <pabeni@redhat.com>,
        Florian Fainelli <f.fainelli@gmail.com>,
        Heiner Kallweit <hkallweit1@gmail.com>,
        Russell King <linux@armlinux.org.uk>,
        linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org
References: <20220830095549.120625-1-maxime.chevallier@bootlin.com>
 <20220830095549.120625-6-maxime.chevallier@bootlin.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <20220830095549.120625-6-maxime.chevallier@bootlin.com>
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Precedence: bulk

On 30/08/2022 12:55, Maxime Chevallier wrote:
> Some implementations of the TSE have their PCS as an external bloc,
> exposed at its own register range. Document this, and add a new example
> showing a case using the pcs and the new phylink conversion to connect
> an sfp port to a TSE mac.
> 
> Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
> ---
> V1->V2 :
>  - Fixed example
> 
>  .../devicetree/bindings/net/altr,tse.yaml     | 29 ++++++++++++++++++-
>  1 file changed, 28 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/altr,tse.yaml b/Documentation/devicetree/bindings/net/altr,tse.yaml
> index 1676e13b8c64..4b314861a831 100644
> --- a/Documentation/devicetree/bindings/net/altr,tse.yaml
> +++ b/Documentation/devicetree/bindings/net/altr,tse.yaml
> @@ -39,6 +39,7 @@ allOf:
>        properties:
>          reg:
>            minItems: 6
> +          maxItems: 7
>          reg-names:
>            minItems: 6
>            items:
> @@ -48,6 +49,7 @@ allOf:
>              - const: rx_resp
>              - const: tx_csr
>              - const: tx_desc
> +            - const: pcs
>  
>  properties:
>    compatible:
> @@ -58,7 +60,7 @@ properties:
>  
>    reg:
>      minItems: 4
> -    maxItems: 6
> +    maxItems: 7
>  
>    reg-names:
>      minItems: 4
> @@ -69,6 +71,7 @@ properties:
>        - const: rx_resp
>        - const: tx_csr
>        - const: tx_desc
> +      - const: pcs
>        - const: s1
>  

So now 8 items?

>    interrupts:
> @@ -122,6 +125,30 @@ required:
>  unevaluatedProperties: false
>  
>  examples:
> +  - |
> +    tse_sub_0: ethernet@c0100000 {
> +        compatible = "altr,tse-msgdma-1.0";
> +        reg = <0xc0100000 0x00000400>,
> +              <0xc0101000 0x00000020>,
> +              <0xc0102000 0x00000020>,
> +              <0xc0103000 0x00000008>,
> +              <0xc0104000 0x00000020>,
> +              <0xc0105000 0x00000020>,
> +              <0xc0106000 0x00000100>;
> +        reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc", "pcs";
> +        interrupt-parent = <&intc>;
> +        interrupts = <0 44 4>,<0 45 4>;
> +        interrupt-names = "rx_irq","tx_irq";
> +        rx-fifo-depth = <2048>;
> +        tx-fifo-depth = <2048>;
> +        max-frame-size = <1500>;
> +        local-mac-address = [ 00 0C ED 00 00 02 ];

00 00 00 00 00 00
(easier to spot that it is invalid)

Best regards,
Krzysztof