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Date:   Thu, 1 Sep 2022 15:44:09 +0800
From:   Yuan Yao <yuan.yao@linux.intel.com>
To:     isaku.yamahata@intel.com
Cc:     kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
        isaku.yamahata@gmail.com, Paolo Bonzini <pbonzini@redhat.com>,
        erdemaktas@google.com, Sean Christopherson <seanjc@google.com>,
        Sagi Shahar <sagis@google.com>
Subject: Re: [PATCH v8 041/103] KVM: x86/mmu: Add a new is_private member for
 union kvm_mmu_page_role
Message-ID: <20220901074408.lnmyrc5fmsd3kqdf@yy-desk-7060>
References: <cover.1659854790.git.isaku.yamahata@intel.com>
 <621bbca9e03f1350e393657da3f27f295b57a490.1659854790.git.isaku.yamahata@intel.com>
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On Sun, Aug 07, 2022 at 03:01:26PM -0700, isaku.yamahata@intel.com wrote:
> From: Isaku Yamahata <isaku.yamahata@intel.com>
>
> Because TDX support introduces private mapping, add a new member in union
> kvm_mmu_page_role with access functions to check the member.
>
> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>

Reviewed-by: Yuan Yao <yuan.yao@intel.com>

> ---
>  arch/x86/include/asm/kvm_host.h | 27 +++++++++++++++++++++++++++
>  arch/x86/kvm/mmu/mmu_internal.h | 11 +++++++++++
>  2 files changed, 38 insertions(+)
>
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index e07294fc2219..25835b8c4c12 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -334,7 +334,12 @@ union kvm_mmu_page_role {
>  		unsigned ad_disabled:1;
>  		unsigned guest_mode:1;
>  		unsigned passthrough:1;
> +#ifdef CONFIG_KVM_MMU_PRIVATE
> +		unsigned is_private:1;
> +		unsigned :4;
> +#else
>  		unsigned :5;
> +#endif
>
>  		/*
>  		 * This is left at the top of the word so that
> @@ -346,6 +351,28 @@ union kvm_mmu_page_role {
>  	};
>  };
>
> +#ifdef CONFIG_KVM_MMU_PRIVATE
> +static inline bool kvm_mmu_page_role_is_private(union kvm_mmu_page_role role)
> +{
> +	return !!role.is_private;
> +}
> +
> +static inline void kvm_mmu_page_role_set_private(union kvm_mmu_page_role *role)
> +{
> +	role->is_private = 1;
> +}
> +#else
> +static inline bool kvm_mmu_page_role_is_private(union kvm_mmu_page_role role)
> +{
> +	return false;
> +}
> +
> +static inline void kvm_mmu_page_role_set_private(union kvm_mmu_page_role *role)
> +{
> +	WARN_ON(1);
> +}
> +#endif
> +
>  /*
>   * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties
>   * relevant to the current MMU configuration.   When loading CR0, CR4, or EFER,
> diff --git a/arch/x86/kvm/mmu/mmu_internal.h b/arch/x86/kvm/mmu/mmu_internal.h
> index e1b2e84c16b5..c9446e4e16e3 100644
> --- a/arch/x86/kvm/mmu/mmu_internal.h
> +++ b/arch/x86/kvm/mmu/mmu_internal.h
> @@ -142,6 +142,17 @@ static inline int kvm_mmu_page_as_id(struct kvm_mmu_page *sp)
>  	return kvm_mmu_role_as_id(sp->role);
>  }
>
> +static inline bool is_private_sp(const struct kvm_mmu_page *sp)
> +{
> +	return kvm_mmu_page_role_is_private(sp->role);
> +}
> +
> +static inline bool is_private_sptep(u64 *sptep)
> +{
> +	WARN_ON(!sptep);
> +	return is_private_sp(sptep_to_sp(sptep));
> +}
> +
>  static inline bool kvm_mmu_page_ad_need_write_protect(struct kvm_mmu_page *sp)
>  {
>  	/*
> --
> 2.25.1
>