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[2620:137:e000::1:20]) by mx.google.com with ESMTP id bg8-20020a056a02010800b0042bdc03cc5fsi6977588pgb.408.2022.09.01.01.40.22; Thu, 01 Sep 2022 01:40:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@iram.es header.s=DKIM header.b=naAOJdS5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233046AbiIAHiY (ORCPT + 99 others); Thu, 1 Sep 2022 03:38:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52472 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229639AbiIAHiW (ORCPT ); Thu, 1 Sep 2022 03:38:22 -0400 Received: from mx01.puc.rediris.es (outbound4mad.lav.puc.rediris.es [130.206.19.145]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DEA851108A2 for ; Thu, 1 Sep 2022 00:38:20 -0700 (PDT) Received: from sim.rediris.es (mta-out04.sim.rediris.es [130.206.24.46]) by mx01.puc.rediris.es with ESMTP id 2817bp7d004582-2817bp7f004582 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NO); Thu, 1 Sep 2022 09:37:51 +0200 Received: from sim.rediris.es (localhost.localdomain [127.0.0.1]) by sim.rediris.es (Postfix) with ESMTPS id 377EB39C39; Thu, 1 Sep 2022 09:37:50 +0200 (CEST) Received: from localhost (localhost.localdomain [127.0.0.1]) by sim.rediris.es (Postfix) with ESMTP id 9F7C239C3C; Thu, 1 Sep 2022 09:37:49 +0200 (CEST) X-Amavis-Modified: Mail body modified (using disclaimer) - mta-out04.sim.rediris.es Received: from sim.rediris.es ([127.0.0.1]) by localhost (mta-out04.sim.rediris.es [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id Aco7_lIICjnn; Thu, 1 Sep 2022 09:37:49 +0200 (CEST) Received: from lt-gp.iram.es (haproxy01.sim.rediris.es [130.206.24.69]) by sim.rediris.es (Postfix) with ESMTPA id 1498139C39; Thu, 1 Sep 2022 09:37:46 +0200 (CEST) Date: Thu, 1 Sep 2022 09:37:42 +0200 From: Gabriel Paubert To: Christophe Leroy Cc: Segher Boessenkool , Michael Ellerman , Zhouyi Zhou , "linuxppc-dev@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" , Nicholas Piggin Subject: Re: [PATCH v2] powerpc: Fix irq_soft_mask_set() and irq_soft_mask_return() with sanitizer Message-ID: References: <7c11b659-5b8e-256c-508e-39395041fccb@csgroup.eu> <20220831224522.GX25951@gate.crashing.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable X-FE-Policy-ID: 23:8:0:SYSTEM DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; d=iram.es; s=DKIM; c=relaxed/relaxed; h=date:from:to:cc:subject:message-id:references:mime-version:content-type; bh=8oRtUt8n6oJO2slKo6oCUf7IVvigM4Ug71hTwGM018E=; b=naAOJdS5nF1l3osWGt5jM0E8jjERSjBSaLXL2U3f5R2uLCZHhOI7XyYC+1YfORGLXI/MXoftea7T pvc4WmzeX1Xp+QO+2DY/aelXWhKhWJhn4oo/ajxPFmH2Rxdi2NtaA3pV6/z1O81TH7O54ixy5loJ QrlW0VVVz5Z/YkEbl+afZzQYk1vgNyTqXu3/3XdnDFEBbQdvVbj6d99CbdM8b8xFRb7UcF1F0X4S gxotryTbBL/b+gcWNqiNweqgyOTFreoPrfmH8utRyjG9KHR6mlJHePZelMdv9umKQ4Zq3p0HsOwB WAQnre8JHZRNrJs8osQRzSl80jPc5bJkwYVf0Q== X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 01, 2022 at 05:22:32AM +0000, Christophe Leroy wrote: >=20 >=20 > Le 01/09/2022 =E0 00:45, Segher Boessenkool a =E9crit=A0: > > Hi! > >=20 > > On Tue, Aug 30, 2022 at 09:10:02AM +0000, Christophe Leroy wrote: > >> Le 30/08/2022 =E0 11:01, Nicholas Piggin a =E9crit=A0: > >>> On Tue Aug 30, 2022 at 3:24 PM AEST, Christophe Leroy wrote: > >>>>> This is still slightly concerning to me. Is there any guarantee t= hat the > >>>>> compiler would not use a different sequence for the address here? > >>>>> > >>>>> Maybe explicit r13 is required. > >>>>> > >>>> > >>>> local_paca is defined as: > >>>> > >>>> register struct paca_struct *local_paca asm("r13"); > >=20 > > And this is in global scope, making it a global register variable. > >=20 > >>>> Why would the compiler use another register ? > >>> > >>> Hopefully it doesn't. Is it guaranteed that it won't? > >=20 > > Yes, this is guaranteed. > >=20 > > For a local register variable this is guaranteed only for operands to= an > > extended inline asm; any other access to the variable does not have t= o > > put it in the specified register. > >=20 > > But this is a global register variable. The only thing that would ma= ke > > this crash and burn is if *any* translation unit did not see this > > declaration: it could then use r13 (if that was allowed by the ABI in > > effect, heh). > >=20 > >>> I'm sure Segher will be delighted with the creative asm in __do_IRQ > >>> and call_do_irq :) *Grabs popcorn* > >=20 > > All that %% is blinding, yes. > >=20 > > Inline tabs are bad taste. > >=20 > > Operand names instead of numbers are great for obfuscation, and nothi= ng > > else -- unless you have more than four or five operands, in which cas= e > > you have bigger problems already. > >=20 > > Oh, this function is a good example of proper use of local register a= sm, > > btw. > >=20 > > Comments like "// Inputs" are just harmful. As is the "creative" > > indentation here. Both harm readability and do not help understandin= g > > in any other way either. > >=20 > > The thing about inline asm is the smallest details change meaning of = the > > whole, it is a very harsh environment, you are programming both in C = and > > directly assembler code as well, and things have to be valid for both= , > > although on the other hand there is almost no error checking. Keepin= g > > it small, simple, readable is paramount. > >=20 > > The rules for using inline asm: > >=20 > > 0) Do no use inline asm. > > 1) Use extended asm, unless you know all differences with basic asm, = and > > you know you want that. And if you answer "yes I do" to the latt= er, > > you answered wrong to the former. > > 2) Do not use toplevel asm. > > 3) Do no use inline asm. > > 4) Do no use inline asm. > > 5) Do no use inline asm. > >=20 > > Inline asm is a very powerful escape hatch. Like all emergency exits= , > > you should not use them if you do not need them! :-) > >=20 > > But, you are talking about the function calling and the frame change = I > > bet :-) Both of these are only okay because everything is back as it > > was when this (single!) asm is done, and the state created is perfect= ly > > fine (this is very dependent on exact ABI used, etc.) > >=20 > > I would have used real assembler code here (in a .s file). But there > > probably are reasons to do things this way, performance probably? >=20 > We changed it to inline asm in order to ... inline it in the caller. And there is a single caller it seems. Typically GCC inlines function with a single call site, but it may be confused by asm statements. >=20 > I also find that those operand names make it awull more difficult to=20 > read that traditional numbering. I really dislike that new trend. > And same with those // comments, better use meaningfull C variable name= s. Agree, but there is one thing which escapes me: why is r3 listed in the outputs section (actually as a read write operand with the "+" constraint modifier) but is not used after the asm which is the last statement of function returning void? Do I miss something? Gabriel