Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
MIME-Version: 1.0
References: <20220901222744.2210215-1-heiko@sntech.de> <20220901222744.2210215-3-heiko@sntech.de>
In-Reply-To: <20220901222744.2210215-3-heiko@sntech.de>
From:   Guo Ren <guoren@kernel.org>
Date:   Fri, 2 Sep 2022 09:06:05 +0800
Message-ID: <CAJF2gTTYFWk0T7kbiURaMc_QO4O=sjdFFjOxnaxGApuMYsopZw@mail.gmail.com>
Subject: Re: [PATCH 3/4] riscv: use BIT macros in t-head errata init
To:     Heiko Stuebner <heiko@sntech.de>
Cc:     paul.walmsley@sifive.com, palmer@dabbelt.com,
        aou@eecs.berkeley.edu, conor.dooley@microchip.com,
        apatel@ventanamicro.com, atishp@rivosinc.com,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Content-Type: text/plain; charset="UTF-8"
Precedence: bulk

Reviewed-by: Guo Ren <guoren@kernel.org>

On Fri, Sep 2, 2022 at 6:28 AM Heiko Stuebner <heiko@sntech.de> wrote:
>
> Using the appropriate BIT macro makes the code better readable.
>
> Suggested-by: Conor Dooley <conor.dooley@microchip.com>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  arch/riscv/errata/thead/errata.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
> index bffa711aaf64..a6f4bd8ccf3f 100644
> --- a/arch/riscv/errata/thead/errata.c
> +++ b/arch/riscv/errata/thead/errata.c
> @@ -49,10 +49,10 @@ static u32 thead_errata_probe(unsigned int stage,
>         u32 cpu_req_errata = 0;
>
>         if (errata_probe_pbmt(stage, archid, impid))
> -               cpu_req_errata |= (1U << ERRATA_THEAD_PBMT);
> +               cpu_req_errata |= BIT(ERRATA_THEAD_PBMT);
>
>         if (errata_probe_cmo(stage, archid, impid))
> -               cpu_req_errata |= (1U << ERRATA_THEAD_CMO);
> +               cpu_req_errata |= BIT(ERRATA_THEAD_CMO);
>
>         return cpu_req_errata;
>  }
> --
> 2.35.1
>


-- 
Best Regards
 Guo Ren