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Date:   Fri, 2 Sep 2022 09:57:49 +0200
From:   Maxime Chevallier <maxime.chevallier@bootlin.com>
To:     Jakub Kicinski <kuba@kernel.org>
Cc:     davem@davemloft.net, Rob Herring <robh+dt@kernel.org>,
        netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
        thomas.petazzoni@bootlin.com, Andrew Lunn <andrew@lunn.ch>,
        Eric Dumazet <edumazet@google.com>,
        Paolo Abeni <pabeni@redhat.com>,
        Florian Fainelli <f.fainelli@gmail.com>,
        Heiner Kallweit <hkallweit1@gmail.com>,
        Russell King <linux@armlinux.org.uk>,
        linux-arm-kernel@lists.infradead.org,
        Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        devicetree@vger.kernel.org
Subject: Re: [PATCH net-next v3 4/5] net: altera: tse: convert to phylink
Message-ID: <20220902095749.6af6af62@pc-10.home>
In-Reply-To: <20220901211021.52520588@kernel.org>
References: <20220901143543.416977-1-maxime.chevallier@bootlin.com>
        <20220901143543.416977-5-maxime.chevallier@bootlin.com>
        <20220901211021.52520588@kernel.org>
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Hello Jakub,

On Thu, 1 Sep 2022 21:10:21 -0700
Jakub Kicinski <kuba@kernel.org> wrote:

> On Thu,  1 Sep 2022 16:35:42 +0200 Maxime Chevallier wrote:
> > This commit converts the Altera Triple Speed Ethernet Controller to
> > phylink. This controller supports MII, GMII and RGMII with its MAC,
> > and SGMII + 1000BaseX through a small embedded PCS.
> > 
> > The PCS itself has a register set very similar to what is found in a
> > typical 802.3 ethernet PHY, but this register set memory-mapped
> > instead of lying on an mdio bus.  
> 
> allmodconfig builds report:
> 
> ERROR: modpost: missing MODULE_LICENSE() in
> drivers/net/pcs/pcs-altera-tse.o

Ah you're right, I forgot to specify it. I'll address that in the next
version, thanks !

Maxime