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From:   <Conor.Dooley@microchip.com>
To:     <heiko@sntech.de>, <paul.walmsley@sifive.com>,
        <palmer@dabbelt.com>, <aou@eecs.berkeley.edu>
CC:     <guoren@kernel.org>, <apatel@ventanamicro.com>,
        <atishp@rivosinc.com>, <linux-riscv@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/4] riscv: use BIT macros in t-head errata init
Thread-Topic: [PATCH 3/4] riscv: use BIT macros in t-head errata init
Thread-Index: AQHYvlIz1Q6Z0RUZR0ytlPEcYglJ3K3L4d8A
Date:   Fri, 2 Sep 2022 09:35:11 +0000
Message-ID: <a713cddf-871b-de0a-d408-f38eaea42085@microchip.com>
References: <20220901222744.2210215-1-heiko@sntech.de>
 <20220901222744.2210215-3-heiko@sntech.de>
In-Reply-To: <20220901222744.2210215-3-heiko@sntech.de>
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