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From:   Jani Nikula <jani.nikula@linux.intel.com>
To:     cgel.zte@gmail.com, joonas.lahtinen@linux.intel.com
Cc:     tvrtko.ursulin@linux.intel.com, airlied@linux.ie,
        intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org,
        dri-devel@lists.freedesktop.org, rodrigo.vivi@intel.com,
        Zeal Robot <zealci@zte.com.cn>,
        zhang songyi <zhang.songyi@zte.com.cn>
Subject: Re: [PATCH linux-next] drm/i915: Remove the unneeded result variables
In-Reply-To: <20220902092027.320738-1-zhang.songyi@zte.com.cn>
Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo
References: <20220902092027.320738-1-zhang.songyi@zte.com.cn>
Date:   Fri, 02 Sep 2022 18:04:49 +0300
Message-ID: <87bkrxddgu.fsf@intel.com>
MIME-Version: 1.0
Content-Type: text/plain
Precedence: bulk

On Fri, 02 Sep 2022, cgel.zte@gmail.com wrote:
> From: zhang songyi <zhang.songyi@zte.com.cn>
>
> Return the mul_u32_fixed16() and div_fixed16() directly instead of
>  redundant variables.
>
> Reported-by: Zeal Robot <zealci@zte.com.cn>
> Signed-off-by: zhang songyi <zhang.songyi@zte.com.cn>

NAK.


BR,
Jani.


> ---
>  drivers/gpu/drm/i915/intel_pm.c | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 210c1f78cc90..a6757ed9081a 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5272,7 +5272,6 @@ skl_wm_method2(u32 pixel_rate, u32 pipe_htotal, u32 latency,
>  	       uint_fixed_16_16_t plane_blocks_per_line)
>  {
>  	u32 wm_intermediate_val;
> -	uint_fixed_16_16_t ret;
>  
>  	if (latency == 0)
>  		return FP_16_16_MAX;
> @@ -5280,8 +5279,8 @@ skl_wm_method2(u32 pixel_rate, u32 pipe_htotal, u32 latency,
>  	wm_intermediate_val = latency * pixel_rate;
>  	wm_intermediate_val = DIV_ROUND_UP(wm_intermediate_val,
>  					   pipe_htotal * 1000);
> -	ret = mul_u32_fixed16(wm_intermediate_val, plane_blocks_per_line);
> -	return ret;
> +
> +	return mul_u32_fixed16(wm_intermediate_val, plane_blocks_per_line);
>  }
>  
>  static uint_fixed_16_16_t
> @@ -5290,7 +5289,6 @@ intel_get_linetime_us(const struct intel_crtc_state *crtc_state)
>  	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
>  	u32 pixel_rate;
>  	u32 crtc_htotal;
> -	uint_fixed_16_16_t linetime_us;
>  
>  	if (!crtc_state->hw.active)
>  		return u32_to_fixed16(0);
> @@ -5301,9 +5299,8 @@ intel_get_linetime_us(const struct intel_crtc_state *crtc_state)
>  		return u32_to_fixed16(0);
>  
>  	crtc_htotal = crtc_state->hw.pipe_mode.crtc_htotal;
> -	linetime_us = div_fixed16(crtc_htotal * 1000, pixel_rate);
>  
> -	return linetime_us;
> +	return div_fixed16(crtc_htotal * 1000, pixel_rate);
>  }
>  
>  static int

-- 
Jani Nikula, Intel Open Source Graphics Center