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References: <20220821173051.155038-1-peron.clem@gmail.com> <20220821173051.155038-5-peron.clem@gmail.com>
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From:   =?UTF-8?B?Q2zDqW1lbnQgUMOpcm9u?= <peron.clem@gmail.com>
Date:   Sat, 3 Sep 2022 21:06:08 +0200
Message-ID: <CAJiuCcf0io5T=+Ap8io2uKn+CNqrCi2pbaCtyq2PVW=bEqKakg@mail.gmail.com>
Subject: Re: [PATCH v2 4/4] arm64: dts: allwinner: beelink-gs1: Enable GPU OPP
To:     Samuel Holland <samuel@sholland.org>
Cc:     Chen-Yu Tsai <wens@csie.org>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        devicetree <devicetree@vger.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
        linux-sunxi@lists.linux.dev,
        linux-kernel <linux-kernel@vger.kernel.org>
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Hi Samuel,

On Sat, 3 Sept 2022 at 20:41, Cl=C3=A9ment P=C3=A9ron <peron.clem@gmail.com=
> wrote:
>
> Hi Samuel,
>
> On Tue, 23 Aug 2022 at 05:07, Samuel Holland <samuel@sholland.org> wrote:
> >
> > On 8/21/22 12:30 PM, Cl=C3=A9ment P=C3=A9ron wrote:
> > > Enable GPU OPP table for Beelink GS1
> > >
> > > Signed-off-by: Cl=C3=A9ment P=C3=A9ron <peron.clem@gmail.com>
> > > ---
> > >  arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 2 ++
> > >  1 file changed, 2 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts =
b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
> > > index 6249e9e02928..20fc0584d1c6 100644
> > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
> > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts
> > > @@ -5,6 +5,7 @@
> > >
> > >  #include "sun50i-h6.dtsi"
> > >  #include "sun50i-h6-cpu-opp.dtsi"
> > > +#include "sun50i-h6-gpu-opp.dtsi"
> > >
> > >  #include <dt-bindings/gpio/gpio.h>
> > >
> > > @@ -261,6 +262,7 @@ reg_dcdca: dcdca {
> > >                       };
> > >
> > >                       reg_dcdcc: dcdcc {
> > > +                             regulator-always-on;
> >
> > Why is this necessary? This file already has:
>
> This is a relica from the first serie at this time the OPP doesn't
> properly enable the regulator it's now fixed since:
> https://patchwork.kernel.org/project/linux-pm/patch/81eb2efeeed1556d12406=
5252f32777838a6d850.1589528491.git.viresh.kumar@linaro.org/
>
> I will drop it.

After retesting it, it seems to still no take the regulator and make
my board hang... :(

[   17.698597] sun8i-dw-hdmi 6000000.hdmi: registered DesignWare HDMI
I2C bus driver
[   17.708475] sun4i-drm display-engine: bound 6000000.hdmi (ops
sun8i_dw_hdmi_ops [sun8i_drm_hdmi])
[   17.718350] [drm] Initialized sun4i-drm 1.0.0 20150629 for
display-engine on minor 1
[   17.877443] Console: switching to colour frame buffer device 320x90
[   17.936050] sun4i-drm display-engine: [drm] fb0: sun4i-drmdrmfb
frame buffer device
[   17.961881] platform 5200000.usb: deferred probe pending
>>>> [   31.710731] vdd-gpu: disabling <<<<<


>
> Thanks for the review.
> Regards,
> Clement
>
>
>
>
> >
> > &gpu {
> >         mali-supply =3D <&reg_dcdcc>;
> >         status =3D "okay";
> > };
> >
> > So there is a consumer for this regulator.
> >
> > Regards,
> > Samuel
> >
> > >                               regulator-enable-ramp-delay =3D <32000>=
;
> > >                               regulator-min-microvolt =3D <810000>;
> > >                               regulator-max-microvolt =3D <1080000>;
> > >
> >