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b=7/tlAApMJ6bUsjv4pE5Jk4O8+IPs1umac3aNhZIZktymZShre6dpGPdlRc74SYOUZH yZ1/kH3Rl46vZzuWH7OFp8a20ofUEv1Vv6UTZhSzvRknYf3/E4U9z1lXRz5ryDJr8YM1 6BcA7cWYMKE6Svm5UhE2Yk93+JTi0LGfpqemhcEZV0VbXPmX0JODLOIxKD/353s3wh6j 6ld1t2VcdbORJ0IQUslTj+zZIrhGuHYbTAkAO3l6K/0MXVRVLg3ccE/cd+AHYWIGkJEH isVMiV04KBtkw1pi/JCW6zPePG8lIIbeNov9b3s0Q76SbZI/3v3bpCpzNS85hLYVSIkw uNhw== X-Gm-Message-State: ACgBeo2IfFh8Is35AK7gLD0i6rNQdVeaK27I/0DomitDDnM8l0xdwqgx PjzEAWbf+5rNITWB24y8NckaojQ1AShtdMKkf14= X-Received: by 2002:a17:907:8a09:b0:731:610:ff8d with SMTP id sc9-20020a1709078a0900b007310610ff8dmr32726251ejc.399.1662301759048; Sun, 04 Sep 2022 07:29:19 -0700 (PDT) MIME-Version: 1.0 References: <20220821173051.155038-1-peron.clem@gmail.com> <20220821173051.155038-5-peron.clem@gmail.com> <0c028109-bb50-fbaa-de18-9876706a7477@sholland.org> <26ebdc2d-caca-2d53-45bc-8c8b90c7c1fd@sholland.org> In-Reply-To: From: =?UTF-8?B?Q2zDqW1lbnQgUMOpcm9u?= Date: Sun, 4 Sep 2022 16:29:07 +0200 Message-ID: Subject: Re: [PATCH v2 4/4] arm64: dts: allwinner: beelink-gs1: Enable GPU OPP To: Samuel Holland Cc: Chen-Yu Tsai , Jernej Skrabec , Rob Herring , Krzysztof Kozlowski , devicetree , linux-arm-kernel , linux-sunxi@lists.linux.dev, linux-kernel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Samuel, On Sun, 4 Sept 2022 at 16:23, Cl=C3=A9ment P=C3=A9ron wrote: > > Hi Samuel, > > On Sun, 4 Sept 2022 at 05:32, Samuel Holland wrote: > > > > On 9/3/22 2:06 PM, Cl=C3=A9ment P=C3=A9ron wrote: > > > Hi Samuel, > > > > > > On Sat, 3 Sept 2022 at 20:41, Cl=C3=A9ment P=C3=A9ron wrote: > > >> > > >> Hi Samuel, > > >> > > >> On Tue, 23 Aug 2022 at 05:07, Samuel Holland w= rote: > > >>> > > >>> On 8/21/22 12:30 PM, Cl=C3=A9ment P=C3=A9ron wrote: > > >>>> Enable GPU OPP table for Beelink GS1 > > >>>> > > >>>> Signed-off-by: Cl=C3=A9ment P=C3=A9ron > > >>>> --- > > >>>> arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 2 ++ > > >>>> 1 file changed, 2 insertions(+) > > >>>> > > >>>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.d= ts b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts > > >>>> index 6249e9e02928..20fc0584d1c6 100644 > > >>>> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts > > >>>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts > > >>>> @@ -5,6 +5,7 @@ > > >>>> > > >>>> #include "sun50i-h6.dtsi" > > >>>> #include "sun50i-h6-cpu-opp.dtsi" > > >>>> +#include "sun50i-h6-gpu-opp.dtsi" > > >>>> > > >>>> #include > > >>>> > > >>>> @@ -261,6 +262,7 @@ reg_dcdca: dcdca { > > >>>> }; > > >>>> > > >>>> reg_dcdcc: dcdcc { > > >>>> + regulator-always-on; > > >>> > > >>> Why is this necessary? This file already has: > > >> > > >> This is a relica from the first serie at this time the OPP doesn't > > >> properly enable the regulator it's now fixed since: > > >> https://patchwork.kernel.org/project/linux-pm/patch/81eb2efeeed1556d= 124065252f32777838a6d850.1589528491.git.viresh.kumar@linaro.org/ > > > > This should have nothing to do with the OPP driver; lima already has a = "mali" > > regulator consumer that should be enabled whenever the GPU is in use. > > Okay so you propose to add a regulator_enable() in the panfrost > drivers in addition to the OPP consumer right? After a quick look it seems that it's explicit that we don't want two consumer for the same regulator and OPP should handle the enabling of the regulator. /* OPP will handle regulators */ if (!pfdev->pfdevfreq.opp_of_table_added) { err =3D panfrost_regulator_init(pfdev); if (err) goto out_devfreq; } > > I will send a patch to add this and see what's panfrost maintainer > think about it. > > Regards, > Clement > > > > > _Adding_ a regulator consumer from the OPP driver should not somehow de= crease > > the refcount. > > > > >> I will drop it. > > > > > > After retesting it, it seems to still no take the regulator and make > > > my board hang... :( > > > > > > [ 17.698597] sun8i-dw-hdmi 6000000.hdmi: registered DesignWare HDMI > > > I2C bus driver > > > [ 17.708475] sun4i-drm display-engine: bound 6000000.hdmi (ops > > > sun8i_dw_hdmi_ops [sun8i_drm_hdmi]) > > > [ 17.718350] [drm] Initialized sun4i-drm 1.0.0 20150629 for > > > display-engine on minor 1 > > > [ 17.877443] Console: switching to colour frame buffer device 320x9= 0 > > > [ 17.936050] sun4i-drm display-engine: [drm] fb0: sun4i-drmdrmfb > > > frame buffer device > > > [ 17.961881] platform 5200000.usb: deferred probe pending > > >>>>> [ 31.710731] vdd-gpu: disabling <<<<< > > > > Are there any messages from lima, especially about mali-supply? Can you= provide > > regulators_summary from debugfs? > > > > Regards, > > Samuel