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From:   Heiko =?ISO-8859-1?Q?St=FCbner?= <heiko@sntech.de>
To:     paul.walmsley@sifive.com, palmer@dabbelt.com,
        aou@eecs.berkeley.edu, Conor.Dooley@microchip.com
Cc:     guoren@kernel.org, apatel@ventanamicro.com, atishp@rivosinc.com,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 4/5] riscv: use BIT() marco for cpufeature probing
Date:   Mon, 05 Sep 2022 16:12:26 +0200
Message-ID: <13885578.y0N7aAr316@diego>
In-Reply-To: <7693745.aoefvbuG5b@diego>
References: <20220905111027.2463297-1-heiko@sntech.de> <1e61d31a-9bf5-af79-dbc4-87d63d24b497@microchip.com> <7693745.aoefvbuG5b@diego>
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Am Montag, 5. September 2022, 13:23:01 CEST schrieb Heiko St?bner:
> Am Montag, 5. September 2022, 13:19:41 CEST schrieb Conor.Dooley@microchip.com:
> > On 05/09/2022 12:10, Heiko Stuebner wrote:
> > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> > > 
> > > Using the appropriate BIT macro makes the code better readable.
> > > 
> > > Suggested-by: Conor Dooley <conor.dooley@microchip.com>
> > > Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> > 
> > Missing the cover-letter with the changelog?
> > At least, I didn't get it in my inbox.
> 
> darn git send-email and its automatic selection ;-)
> 
> I.e. I _should_ have added you to the hard recipient list for my series
> in the first place, but instead git send-email selected you based on
> the Suggested-by ... but it looks like these selectoions don't get
> applied to the cover-letter ... sorry about that

For the record, the series is here:
https://lore.kernel.org/all/20220905111027.2463297-1-heiko@sntech.de/

Though right now, I don't see it in the linux-riscv list-archive or my
own inbox of that list. Maybe infradead has some issue today.


> 
> 
> Heiko
> 
> 
> > Either way,
> > 
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > 
> > > ---
> > >   arch/riscv/kernel/cpufeature.c | 4 ++--
> > >   1 file changed, 2 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> > > index 729f7a218093..08f7445985dc 100644
> > > --- a/arch/riscv/kernel/cpufeature.c
> > > +++ b/arch/riscv/kernel/cpufeature.c
> > > @@ -289,10 +289,10 @@ static u32 __init_or_module cpufeature_probe(unsigned int stage)
> > >          u32 cpu_req_feature = 0;
> > > 
> > >          if (cpufeature_probe_svpbmt(stage))
> > > -               cpu_req_feature |= (1U << CPUFEATURE_SVPBMT);
> > > +               cpu_req_feature |= BIT(CPUFEATURE_SVPBMT);
> > > 
> > >          if (cpufeature_probe_zicbom(stage))
> > > -               cpu_req_feature |= (1U << CPUFEATURE_ZICBOM);
> > > +               cpu_req_feature |= BIT(CPUFEATURE_ZICBOM);
> > > 
> > >          return cpu_req_feature;
> > >   }
> > > --
> > > 2.35.1
> > > 
> > 
> > 
> 
>