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Date:   Mon, 5 Sep 2022 18:34:55 +0300
From:   Mika Westerberg <mika.westerberg@linux.intel.com>
To:     Kai-Heng Feng <kai.heng.feng@canonical.com>
Cc:     andreas.noever@gmail.com, michael.jamet@intel.com,
        YehezkelShB@gmail.com, sanju.mehta@amd.com,
        mario.limonciello@amd.com, linux-usb@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH] thunderbolt: Resume PCIe bridges after switch is found
 on AMD USB4 controller
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On Mon, Sep 05, 2022 at 11:21:36PM +0800, Kai-Heng Feng wrote:
> > Hmm, so you see the actual hotplug but the tunneled PCIe link may not be
> > detected? Does the PCIe "Card Present" (or Data Link Layer Active)
> > status change at all or is it always 0?
> 
> It changes only after tb_switch_add() is called.

I doubt tb_switch_add() does anything but instead it is the established
PCIe tunnel that then shows up as it toggles the Card Present bit or so.
But that should also trigger PME if the root port is in D3 so you should
see this wake if everything works accordingly (unless I'm missing
something).

So if you do this:

1. Boot the system up, nothing connected
2. Plug in the TBT/USB4 device but do not authorize the PCIe tunnel
3. Wait for the TBT/USB4 domain to enter sleep (runtime suspend)
4. Authorize the PCIe tunnel

  # echo 1 > .../authorized

The established PCIe tunnel should trigger PME and the root port then
should be able to detect the PCIe link. Can you add full dmesg with
"thunderbolt.dyndbg=+p" in the command line to the bug?