Received: by 2002:a05:6358:bb9e:b0:b9:5105:a5b4 with SMTP id df30csp3471134rwb; Mon, 5 Sep 2022 12:17:12 -0700 (PDT) X-Google-Smtp-Source: AA6agR4V6tjCjFYlqYLOd9rGY48WnRL9ryVttSDSuCgGQftJx9QfRfJnYoPzrwRlV5k1nFFsVyJC X-Received: by 2002:a05:6a00:4393:b0:52f:3603:e62f with SMTP id bt19-20020a056a00439300b0052f3603e62fmr51230321pfb.23.1662405432171; Mon, 05 Sep 2022 12:17:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1662405432; cv=none; d=google.com; s=arc-20160816; b=LRzo5Bj/3Wv6aLQleFm+s9vWBzCOZCNHtnPspP1FggGd08jUFnx1/LSbM7IK5Z04Pm DB+mQMohW3bZbN/iQESugbJJyNdNf3yCCh3GXbBgnbC0ADbFeCDH6TF+uSil2r/4q8kq hx5GW/eYXVt/Lfxrz7VR0gSRcbKGtrcSDtW2HuLzkI+zasGRUn3R1wDY+EBBwMPiT7bO dsxsk+EKpxXsvoWP5zwr9MrtCHjImXOMAwWwBCw3l54P05xYvX4zCSFxdTzgpja9LF/o 88XF5u1QGfVG75GU1SdOZ2ljoJzq6Ew2xw79iMw5znLLnYv26KZO9ySSVQRZlHZcdxk9 9j0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=WoZhWipfEwAVnSimSDbEhJjErcHYgYYnmyMKdYDuww8=; b=wwUXKSvS5CWErzt9DIi6kmfA1RVmJuMcURvjQ2PRV5u2YS6nlAgl+hzrJSSyeQHyCY 6KAiVea9L77UGPaRnDT01qZr3P4fxutZdLRe/60e5bvhw6gYlGSm5EvBrZK3O8O/uHqb aingeKChBBqe5z0EsUPPYiprUBijhw0/O8/df/LizIjzjJ0wsAYHbDxDWSEgVgQBxJ9h YJKxeqdIcYMm3Yw2lS6/+Gv/fVUwHyoRF+SpuOdFBvJkix02MJFOx9WdhbRXHHZ47qwq qSt0uJadL20suQ9t2WESpjR8LHMuOEBvbhGzt4An+iLiIGPjuE8Takv4yulcM4Ueru1j 8LsQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="D8ZX/7+6"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id 10-20020a63184a000000b0042fb0febbddsi10395900pgy.656.2022.09.05.12.16.54; Mon, 05 Sep 2022 12:17:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="D8ZX/7+6"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232548AbiIESwV (ORCPT + 99 others); Mon, 5 Sep 2022 14:52:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231981AbiIESwR (ORCPT ); Mon, 5 Sep 2022 14:52:17 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0B2B3275E3; Mon, 5 Sep 2022 11:52:17 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id B9DC0B81369; Mon, 5 Sep 2022 18:52:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4526FC433C1; Mon, 5 Sep 2022 18:52:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1662403934; bh=V3DhFxwkMch9V2j0LUuXL2Z76OR6gdn4dJaqm2PVFrA=; h=From:To:Cc:Subject:Date:From; b=D8ZX/7+6iZhkm7DwdyXnnAUNzjMMjFr600fMjbbqj6JCiqX/uMRKAW08L1eh96dVM pztQTMKUi0MMS9SIfBxS9E68k8SVFZ8JScoc0wPjAk9MVu4TylXvBXB0IfdgjV2ddM VWtDoXN2Uq2KrHmYNPwJwiY3tNMlOtIsAa8DFASBrczcHrgpB94fWDgJVG4vk32twt DeOAEKl/CnsJBFaztcxsWC5tQrZqRNTNIGM+xXk1u+whduyrpjliDFY62vZkWnWaaz asRH6kz471je4aKjgDNgHThxhrRHpSdbzg8rq/2VIdOtkNJb0EVQmM1WhRKUAzIPXO 3y4fX8uF9i6Ag== Received: by pali.im (Postfix) id C5AF47D7; Mon, 5 Sep 2022 20:52:11 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Lorenzo Pieralisi , Rob Herring , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Bjorn Helgaas , Thomas Petazzoni Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/2] PCI: mvebu: use BIT() and GENMASK() macros instead of hardcoded hex values Date: Mon, 5 Sep 2022 20:51:49 +0200 Message-Id: <20220905185150.22220-1-pali@kernel.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Pali Rohár --- drivers/pci/controller/pci-mvebu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 8bde4727aca4..c222dc189567 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -44,7 +44,7 @@ #define PCIE_WIN5_BASE_OFF 0x1884 #define PCIE_WIN5_REMAP_OFF 0x188c #define PCIE_CONF_ADDR_OFF 0x18f8 -#define PCIE_CONF_ADDR_EN 0x80000000 +#define PCIE_CONF_ADDR_EN BIT(31) #define PCIE_CONF_REG(r) ((((r) & 0xf00) << 16) | ((r) & 0xfc)) #define PCIE_CONF_BUS(b) (((b) & 0xff) << 16) #define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11) @@ -70,13 +70,13 @@ #define PCIE_INT_ERR_MASK (PCIE_INT_ERR_FATAL | PCIE_INT_ERR_NONFATAL | PCIE_INT_ERR_COR) #define PCIE_INT_ALL_MASK GENMASK(31, 0) #define PCIE_CTRL_OFF 0x1a00 -#define PCIE_CTRL_X1_MODE 0x0001 +#define PCIE_CTRL_X1_MODE BIT(0) #define PCIE_CTRL_RC_MODE BIT(1) #define PCIE_CTRL_MASTER_HOT_RESET BIT(24) #define PCIE_STAT_OFF 0x1a04 -#define PCIE_STAT_BUS 0xff00 -#define PCIE_STAT_DEV 0x1f0000 #define PCIE_STAT_LINK_DOWN BIT(0) +#define PCIE_STAT_BUS GENMASK(15, 8) +#define PCIE_STAT_DEV GENMASK(20, 16) #define PCIE_SSPL_OFF 0x1a0c #define PCIE_SSPL_VALUE_SHIFT 0 #define PCIE_SSPL_VALUE_MASK GENMASK(7, 0) -- 2.20.1