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In-Reply-To: <048bb217-e91e-b727-fcd1-e55755a87d0d@microchip.com>
From:   Zong Li <zong.li@sifive.com>
Date:   Tue, 6 Sep 2022 14:51:57 +0800
Message-ID: <CANXhq0prxrXYOson4pQBq6_cWSTcZ5CZs7JyOfsFuQE8oc2pwA@mail.gmail.com>
Subject: Re: [PATCH v2 2/6] soc: sifive: ccache: Rename SiFive L2 cache to
 Composable cache.
To:     Conor Dooley <Conor.Dooley@microchip.com>
Cc:     Zong Li <zongbox@gmail.com>, Rob Herring <robh+dt@kernel.org>,
        krzysztof.kozlowski+dt@linaro.org,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Greentime Hu <greentime.hu@sifive.com>,
        Ben Dooks <ben.dooks@sifive.com>, bp@alien8.de,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        linux-riscv <linux-riscv@lists.infradead.org>,
        linux-edac@vger.kernel.org,
        "linux-kernel@vger.kernel.org List" <linux-kernel@vger.kernel.org>
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On Tue, Sep 6, 2022 at 2:23 PM <Conor.Dooley@microchip.com> wrote:
>
> On 06/09/2022 02:44, Zong Li wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know =
the content is safe
> >
> > <Conor.Dooley@microchip.com> =E6=96=BC 2022=E5=B9=B49=E6=9C=886=E6=97=
=A5 =E9=80=B1=E4=BA=8C =E5=87=8C=E6=99=A82:48=E5=AF=AB=E9=81=93=EF=BC=9A
> >>
> >> Noticed a another thing, sorry..
> >>
> >> On 05/09/2022 09:31, Zong Li wrote:
> >>> EXTERNAL EMAIL: Do not click links or open attachments unless you kno=
w the content is safe
> >>>
> >>> From: Greentime Hu <greentime.hu@sifive.com>
> >>>
> >>> Since composable cache may be L3 cache if pL2 cache exists, we should=
 use
> >>> its original name composable cache to prevent confusion.
> >>>
> >>> Apart from renaming, we also add the compatible "sifive,ccache0" into=
 ID
> >>> table.
> >>>
> >>> Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> >>> Signed-off-by: Zong Li <zong.li@sifive.com>
> >>> ---
> >>>   drivers/soc/sifive/Kconfig                    |   6 +-
> >>>   drivers/soc/sifive/Makefile                   |   2 +-
> >>>   .../{sifive_l2_cache.c =3D> sifive_ccache.c}    | 163 +++++++++----=
-----
> >>>   .../{sifive_l2_cache.h =3D> sifive_ccache.h}    |  16 +-
> >>>   4 files changed, 94 insertions(+), 93 deletions(-)
> >>>   rename drivers/soc/sifive/{sifive_l2_cache.c =3D> sifive_ccache.c} =
(35%)
> >>>   rename include/soc/sifive/{sifive_l2_cache.h =3D> sifive_ccache.h} =
(12%)
> >>>
> >>
> >>> -static ssize_t l2_write(struct file *file, const char __user *data,
> >>> +static ssize_t ccache_write(struct file *file, const char __user *da=
ta,
> >>>                          size_t count, loff_t *ppos)
> >>
> >> You need to fix the alignment here as per checkpatch:
> >> CHECK: Alignment should match open parenthesis
> >> #112: FILE: drivers/soc/sifive/sifive_ccache.c:53:
> >> +static ssize_t ccache_write(struct file *file, const char __user *dat=
a,
> >> +                       size_t count, loff_t *ppos)
> >>
> >
> > I'm not sure why I don't see that by checkpatch, but it looks that it
> > is actually misalignment there, I would re-check all indents in
> > source. Thanks.
>
> You need to pass --strict to checkpatch to see it.

Many thanks for the tip, I can see the message after applying the option.

>
> >
> >>>   {
> >>>          unsigned int val;
> >>> @@ -57,75 +57,76 @@ static ssize_t l2_write(struct file *file, const =
char __user *data,
> >>>          if (kstrtouint_from_user(data, count, 0, &val))
> >>>                  return -EINVAL;
> >>>          if ((val < 0xFF) || (val >=3D 0x10000 && val < 0x100FF))
> >>> -               writel(val, l2_base + SIFIVE_L2_ECCINJECTERR);
> >>> +               writel(val, ccache_base + SIFIVE_CCACHE_ECCINJECTERR)=
;
> >>>          else
> >>>                  return -EINVAL;
> >>>          return count;
> >>>   }
> >>>
>