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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN8PR11MB3668.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 287bbc12-2f8f-40f4-84e1-08da8ff5bfc0 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Sep 2022 10:51:27.2858 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3f4057f3-b418-4d4e-ba84-d55b4e897d88 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: DHIQcFi+ez8CobVSxEkbf/Z7GtRJKZuKBxRc10C1yr1exlAJGaCl/COQo3EZ+y4gYAySY8BK4oB3KZFJETtg1EvoZUh5jWkj1viJUkmxSjzqGAMdvmvTwSKTYErw1HQm X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR11MB5962 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Greg KH > Sent: Tuesday, September 6, 2022 2:19 PM > To: Kumaravel Thiagarajan - I21417 > Cc: linux-kernel@vger.kernel.org; kbuild-all@lists.01.org; lkp@intel.com > Subject: Re: [PATCH char-misc-next] misc: microchip: pci1xxxx: Include > depends on PCI & select AUXILIARY_BUS in the Kconfig file to resolve buil= d > issues. >=20 >=20 > Your subject line is way too long :( I have tried to make it a little shorter. >=20 >=20 > On Tue, Sep 06, 2022 at 02:05:55PM +0530, Kumaravel Thiagarajan wrote: > > Some build errors were reported by kernel test robot > > on the char-misc-next branch. This add-on patch will fix the errors. >=20 > You should list the errors here so that we know what they are. Ok. This is taken care of in v2. >=20 > > > > Fixes: 393fc2f5948fd340d016a9557eea6e1ac2f6c60c >=20 > As per the kernel documentation, this should be: > Fixes: 393fc2f5948f ("misc: microchip: pci1xxxx: load auxiliary bus drive= r for > the PIO function in the multi-function endpoint of pci1xxxx device.") Ok. This is taken care of in v2. >=20 > Can you fix this up and send a v2? I have sent you the v2 but just now noticed that I did not include v1 -> V2= change history. I am really sorry about that. Thank You. Regards, Kumaravel