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Date:   Tue, 6 Sep 2022 16:41:26 +0200
From:   Andrew Jones <ajones@ventanamicro.com>
To:     Jinyu Tang <tjytimi@163.com>
Cc:     paul.walmsley@sifive.com, palmer@dabbelt.com,
        aou@eecs.berkeley.edu, conor.dooley@microchip.com,
        anup@brainfault.org, alexandre.ghiti@canonical.com,
        guoren@kernel.org, akpm@linux-foundation.org, heiko@sntech.de,
        tongtiangen@huawei.com, sunnanyong@huawei.com,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
        falcon@tinylab.org
Subject: Re: [PATCH v1] riscv : support update_mmu_tlb() for riscv
Message-ID: <20220906144126.3enx6y2mhevrc4ur@kamzik>
References: <20220906121921.8355-1-tjytimi@163.com>
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On Tue, Sep 06, 2022 at 08:19:21PM +0800, Jinyu Tang wrote:
> Add macro definition to support updata_mmu_tlb() for riscv,
> this function is from commit:7df676974359 ("mm/memory.c:Update 
> local TLB if PTE entry exists").
> 
> Signed-off-by: Jinyu Tang <tjytimi@163.com>
> ---
>  arch/riscv/include/asm/pgtable.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
> index 7ec936910a96..84a791d54f95 100644
> --- a/arch/riscv/include/asm/pgtable.h
> +++ b/arch/riscv/include/asm/pgtable.h
> @@ -418,6 +418,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
>  	local_flush_tlb_page(address);
>  }
>  
> +#define	__HAVE_ARCH_UPDATE_MMU_TLB
           ^ just a single space here, please, as all the other
	     'define __HAVE's in this file

> +#define update_mmu_tlb	update_mmu_cache
> +
>  static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
>  		unsigned long address, pmd_t *pmdp)
>  {
> -- 
> 2.30.2

This seems like the right thing to do, so

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

I'm curious if this patch is the result of debugging something? Or what
led you to post it?

Thanks,
drew