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[82.149.1.172]) by smtp.gmail.com with ESMTPSA id i10-20020a170906264a00b0073cf8e0355fsm6941414ejc.208.2022.09.06.12.54.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Sep 2022 12:54:16 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: maxime@cerno.tech, daniel.lezcano@linaro.org, tglx@linutronix.de, wens@csie.org, samuel@sholland.org, Victor Hassan Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev Subject: Re: [RESEND] clocksource: sun4i: add definition of clear interrupt Date: Tue, 06 Sep 2022 21:54:15 +0200 Message-ID: <2113704.irdbgypaU6@kista> In-Reply-To: <20220906052056.43404-1-victor@allwinnertech.com> References: <20220906052056.43404-1-victor@allwinnertech.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Dne torek, 06. september 2022 ob 07:20:56 CEST je Victor Hassan napisal(a): > To prevent misunderstanding, use TIMER_IRQ_CLEAR instead of TIMER_IRQ_EN > in function sun4i_timer_clear_interrupt. > > Signed-off-by: Victor Hassan Acked-by: Jernej Skrabec Best regards, Jernej > --- > drivers/clocksource/timer-sun4i.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/clocksource/timer-sun4i.c > b/drivers/clocksource/timer-sun4i.c index 94dc6e42e983..e5a70aa1deb4 100644 > --- a/drivers/clocksource/timer-sun4i.c > +++ b/drivers/clocksource/timer-sun4i.c > @@ -26,6 +26,7 @@ > #define TIMER_IRQ_EN_REG 0x00 > #define TIMER_IRQ_EN(val) BIT(val) > #define TIMER_IRQ_ST_REG 0x04 > +#define TIMER_IRQ_CLEAR(val) BIT(val) > #define TIMER_CTL_REG(val) (0x10 * val + 0x10) > #define TIMER_CTL_ENABLE BIT(0) > #define TIMER_CTL_RELOAD BIT(1) > @@ -123,7 +124,7 @@ static int sun4i_clkevt_next_event(unsigned long evt, > > static void sun4i_timer_clear_interrupt(void __iomem *base) > { > - writel(TIMER_IRQ_EN(0), base + TIMER_IRQ_ST_REG); > + writel(TIMER_IRQ_CLEAR(0), base + TIMER_IRQ_ST_REG); > } > > static irqreturn_t sun4i_timer_interrupt(int irq, void *dev_id) > -- > 2.29.0