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Date:   Wed, 07 Sep 2022 12:17:28 +0100
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From:   Marc Zyngier <maz@kernel.org>
To:     Jason Gunthorpe <jgg@nvidia.com>
Cc:     Nipun Gupta <nipun.gupta@amd.com>, robh+dt@kernel.org,
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Subject: Re: [RFC PATCH v3 4/7] bus/cdx: add cdx-MSI domain with gic-its domain as parent
In-Reply-To: <YxeBCsA32jnwMjSj@nvidia.com>
References: <20220803122655.100254-1-nipun.gupta@amd.com>
        <20220906134801.4079497-1-nipun.gupta@amd.com>
        <20220906134801.4079497-5-nipun.gupta@amd.com>
        <YxeBCsA32jnwMjSj@nvidia.com>
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On Tue, 06 Sep 2022 18:19:06 +0100,
Jason Gunthorpe <jgg@nvidia.com> wrote:
> 
> On Tue, Sep 06, 2022 at 07:17:58PM +0530, Nipun Gupta wrote:
> 
> > +static void cdx_msi_write_msg(struct irq_data *irq_data,
> > +			      struct msi_msg *msg)
> > +{
> > +	/*
> > +	 * Do nothing as CDX devices have these pre-populated
> > +	 * in the hardware itself.
> > +	 */
> > +}
> 
> Huh?
> 
> There is no way it can be pre-populated, the addr/data pair,
> especially on ARM, is completely under SW control.

There is nothing in the GIC spec that says that.

> There is some commonly used IOVA base in Linux for the ITS page, but
> no HW should hardwire that.

That's not strictly true. It really depends on how this block is
integrated, and there is a number of existing blocks that know *in HW*
how to signal an LPI.

See, as the canonical example, how the mbigen driver doesn't need to
know about the address of GITS_TRANSLATER.

Yes, this messes with translation (the access is downstream of the
SMMU) if you relied on it to have some isolation, and it has a "black
hole" effect as nobody can have an IOVA that overlaps with the
physical address of the GITS_TRANSLATER register.

But is it illegal as per the architecture? No. It's just stupid.

	M.

-- 
Without deviation from the norm, progress is not possible.