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[2620:137:e000::1:20]) by mx.google.com with ESMTP id fg6-20020a056402548600b0044edb6925a4si3627271edb.368.2022.09.07.09.19.54; Wed, 07 Sep 2022 09:20:19 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="XC5d/3CL"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229536AbiIGQAy (ORCPT + 99 others); Wed, 7 Sep 2022 12:00:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52378 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230153AbiIGQAN (ORCPT ); Wed, 7 Sep 2022 12:00:13 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 50BFDE0E2 for ; Wed, 7 Sep 2022 08:59:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662566395; x=1694102395; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sGQ1bjYMyAie3sSMiqWysbW+sG9slBLGqnQk2Rj19IY=; b=XC5d/3CLNYpIGnE2QIJPLsQqtHBgG9VXKWToELxvM078yP6jJFqnuiTd WkxGiRhUjNTPL4vpezgt+u1w8+Fo0AxFpT1tWzTP/Jc2siQMfNs03Sp6T 23U/vc6FKgSiDtOKRmxgDfzRQgtRCMJdid309YvWQ2S9KW6+K8itdnJv9 6dHm1wLEm/QjH4sv3lAytsdcjDGeNDrRh/lQnLEF/F/8+0co596aLaExe ajl+RxfdGkfv4oY5VC9ASeb3+uSNl/h9Ze0Pt5Y+CWXtk+SfZewjUQZGl t+7MqNXlD0qPsTKNPQ7ZOl+A8n24CvzBuWTUDxwrD/uKD/P3/xgJqSW6I g==; X-IronPort-AV: E=McAfee;i="6500,9779,10463"; a="297701537" X-IronPort-AV: E=Sophos;i="5.93,297,1654585200"; d="scan'208";a="297701537" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Sep 2022 08:59:30 -0700 X-IronPort-AV: E=Sophos;i="5.93,297,1654585200"; d="scan'208";a="676248183" Received: from twinkler-lnx.jer.intel.com ([10.12.87.143]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Sep 2022 08:59:26 -0700 From: Tomas Winkler To: Greg Kroah-Hartman , David Airlie , Daniel Vetter Cc: Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, Tomas Winkler , Alexander Usyskin , Vitaly Lubart , Daniele Ceraolo Spurio Subject: [PATCH v8 12/16] mei: gsc: add transition to PXP mode in resume flow Date: Wed, 7 Sep 2022 18:58:09 +0300 Message-Id: <20220907155813.1427526-13-tomas.winkler@intel.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220907155813.1427526-1-tomas.winkler@intel.com> References: <20220907155813.1427526-1-tomas.winkler@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_NONE, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Vitaly Lubart Added transition to PXP mode in resume flow. CC: Daniele Ceraolo Spurio Signed-off-by: Vitaly Lubart Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/misc/mei/gsc-me.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/misc/mei/gsc-me.c b/drivers/misc/mei/gsc-me.c index 6b22726aed55..75765e4df4ed 100644 --- a/drivers/misc/mei/gsc-me.c +++ b/drivers/misc/mei/gsc-me.c @@ -182,11 +182,22 @@ static int __maybe_unused mei_gsc_pm_suspend(struct device *device) static int __maybe_unused mei_gsc_pm_resume(struct device *device) { struct mei_device *dev = dev_get_drvdata(device); + struct auxiliary_device *aux_dev; + struct mei_aux_device *adev; int err; + struct mei_me_hw *hw; if (!dev) return -ENODEV; + hw = to_me_hw(dev); + aux_dev = to_auxiliary_dev(device); + adev = auxiliary_dev_to_mei_aux_dev(aux_dev); + if (adev->ext_op_mem.start) { + mei_gsc_set_ext_op_mem(hw, &adev->ext_op_mem); + dev->pxp_mode = MEI_DEV_PXP_INIT; + } + err = mei_restart(dev); if (err) return err; -- 2.37.2