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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id l3-20020a056870f14300b0012752d3212fsm4937419oac.53.2022.09.07.10.53.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Sep 2022 10:53:01 -0700 (PDT) Received: (nullmailer pid 3789429 invoked by uid 1000); Wed, 07 Sep 2022 17:53:00 -0000 Date: Wed, 7 Sep 2022 12:53:00 -0500 From: Rob Herring To: Richard Acayan Cc: bjorn.andersson@linaro.org, agross@kernel.org, konrad.dybcio@somainline.org, mturquette@baylibre.com, sboyd@kernel.org, krzysztof.kozlowski+dt@linaro.org, tdas@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, caleb@connolly.tech, jo@jsfamily.in Subject: Re: [PATCH 1/3] dt-bindings: clock: gcc-sdm845: add sdm670 global clocks Message-ID: <20220907175300.GA3779566-robh@kernel.org> References: <20220907025035.15609-1-mailingradian@gmail.com> <20220907025035.15609-2-mailingradian@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220907025035.15609-2-mailingradian@gmail.com> X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 06, 2022 at 10:50:33PM -0400, Richard Acayan wrote: > The Snapdragon 670 clocks will be added into the sdm845 gcc driver. Most > of the new clocks, GDSCs, and resets already have reserved IDs but there > are some resources that don't. Add the new clock and extra BCR from > Snapdragon 670 and document the differences between the SoC parent clocks. > > Signed-off-by: Richard Acayan > --- > .../bindings/clock/qcom,gcc-sdm845.yaml | 24 +++++++++++++++---- > include/dt-bindings/clock/qcom,gcc-sdm845.h | 2 ++ > 2 files changed, 21 insertions(+), 5 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml b/Documentation/defaced/bindings/clock/qcom,gcc-sdm845.yaml > index daf7906ebc40..ba94dd32e619 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml > @@ -19,23 +19,21 @@ description: | > > properties: > compatible: > - const: qcom,gcc-sdm845 > + enum: > + - qcom,gcc-sdm670 > + - qcom,gcc-sdm845 > > clocks: > items: > - description: Board XO source > - description: Board active XO source > - description: Sleep clock source > - - description: PCIE 0 Pipe clock source > - - description: PCIE 1 Pipe clock source You just changed the clocks from 5 to 3. Please test your changes: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@100000: clocks: [[4294967295, 0], [4294967295, 1], [4294967295], [4294967295], [4294967295]] is too long From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@100000: clock-names: ['bi_tcxo', 'bi_tcxo_ao', 'sleep_clk', 'pcie_0_pipe_clk', 'pcie_1_pipe_clk'] is too long From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@100000: clocks: [[4294967295, 0], [4294967295, 1], [4294967295], [4294967295], [4294967295]] is too long From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@100000: clock-names:0: 'pcie_0_pipe_clk' was expected From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@100000: clock-names:1: 'pcie_1_pipe_clk' was expected From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@100000: clock-names: ['bi_tcxo', 'bi_tcxo_ao', 'sleep_clk', 'pcie_0_pipe_clk', 'pcie_1_pipe_clk'] is too long From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml What you want here I think is 'minItems: 3' and then restrict the clocks to 3 or 5 in the if/then schema. Rob