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Cc: Bjorn Andersson Cc: Rob Herring Cc: Vinod Koul Cc: David Miller Signed-off-by: Bhupesh Sharma --- .../devicetree/bindings/net/qcom,ethqos.txt | 66 --------- .../devicetree/bindings/net/qcom,ethqos.yaml | 139 ++++++++++++++++++ 2 files changed, 139 insertions(+), 66 deletions(-) delete mode 100644 Documentation/devicetree/bindings/net/qcom,ethqos.txt create mode 100644 Documentation/devicetree/bindings/net/qcom,ethqos.yaml diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.txt b/Documentation/devicetree/bindings/net/qcom,ethqos.txt deleted file mode 100644 index 1f5746849a71..000000000000 --- a/Documentation/devicetree/bindings/net/qcom,ethqos.txt +++ /dev/null @@ -1,66 +0,0 @@ -Qualcomm Ethernet ETHQOS device - -This documents dwmmac based ethernet device which supports Gigabit -ethernet for version v2.3.0 onwards. - -This device has following properties: - -Required properties: - -- compatible: Should be one of: - "qcom,qcs404-ethqos" - "qcom,sm8150-ethqos" - -- reg: Address and length of the register set for the device - -- reg-names: Should contain register names "stmmaceth", "rgmii" - -- clocks: Should contain phandle to clocks - -- clock-names: Should contain clock names "stmmaceth", "pclk", - "ptp_ref", "rgmii" - -- interrupts: Should contain phandle to interrupts - -- interrupt-names: Should contain interrupt names "macirq", "eth_lpi" - -Rest of the properties are defined in stmmac.txt file in same directory - - -Example: - -ethernet: ethernet@7a80000 { - compatible = "qcom,qcs404-ethqos"; - reg = <0x07a80000 0x10000>, - <0x07a96000 0x100>; - reg-names = "stmmaceth", "rgmii"; - clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; - clocks = <&gcc GCC_ETH_AXI_CLK>, - <&gcc GCC_ETH_SLAVE_AHB_CLK>, - <&gcc GCC_ETH_PTP_CLK>, - <&gcc GCC_ETH_RGMII_CLK>; - interrupts = , - ; - interrupt-names = "macirq", "eth_lpi"; - snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - - snps,txpbl = <8>; - snps,rxpbl = <2>; - snps,aal; - snps,tso; - - phy-handle = <&phy1>; - phy-mode = "rgmii"; - - mdio { - #address-cells = <0x1>; - #size-cells = <0x0>; - compatible = "snps,dwmac-mdio"; - phy1: phy@4 { - device_type = "ethernet-phy"; - reg = <0x4>; - }; - }; - -}; diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml new file mode 100644 index 000000000000..f05df9b0d106 --- /dev/null +++ b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml @@ -0,0 +1,139 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/qcom,ethqos.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Ethernet ETHQOS device + +maintainers: + - Bhupesh Sharma + +description: + This binding describes the dwmmac based Qualcomm ethernet devices which + support Gigabit ethernet (version v2.3.0 onwards). + + So, this file documents platform glue layer for dwmmac stmmac based Qualcomm + ethernet devices. + +allOf: + - $ref: "snps,dwmac.yaml#" + +properties: + compatible: + enum: + - qcom,qcs404-ethqos + - qcom,sm8150-ethqos + + reg: true + + reg-names: + minItems: 1 + items: + - const: stmmaceth + - const: rgmii + + interrupts: true + + interrupt-names: true + + clocks: + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + items: + - const: stmmaceth + - const: pclk + - const: ptp_ref + - const: rgmii + + iommus: + minItems: 1 + maxItems: 2 + + mdio: true + + phy-handle: true + + phy-mode: true + + snps,reset-gpio: true + + snps,tso: + $ref: /schemas/types.yaml#/definitions/flag + description: + Enables the TSO feature otherwise it will be managed by MAC HW capability register. + + power-domains: true + + resets: true + + rx-fifo-depth: true + + tx-fifo-depth: true + +required: + - compatible + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + ethernet1: ethernet@20000 { + compatible = "qcom,sm8150-ethqos"; + reg = <0x0 0x00020000 0x0 0x10000>, + <0x0 0x00036000 0x0 0x100>; + reg-names = "stmmaceth", "rgmii"; + clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; + clocks = <&gcc GCC_EMAC_AXI_CLK>, + <&gcc GCC_EMAC_SLV_AHB_CLK>, + <&gcc GCC_EMAC_PTP_CLK>, + <&gcc GCC_EMAC_RGMII_CLK>; + interrupts = , + ; + interrupt-names = "macirq", "eth_lpi"; + + power-domains = <&gcc EMAC_GDSC>; + resets = <&gcc GCC_EMAC_BCR>; + iommus = <&apps_smmu 0x3C0 0x0>; + + snps,tso; + rx-fifo-depth = <4096>; + tx-fifo-depth = <4096>; + + snps,reset-gpio = <&tlmm 79 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 11000 70000>; + + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + + pinctrl-names = "default"; + pinctrl-0 = <ðernet_defaults>; + + phy-handle = <&rgmii_phy>; + phy-mode = "rgmii"; + max-speed = <1000>; + + mdio { + #address-cells = <0x1>; + #size-cells = <0x0>; + + compatible = "snps,dwmac-mdio"; + rgmii_phy: phy@7 { + reg = <0x7>; + interrupt-parent = <&tlmm>; + interrupts-extended = <&tlmm 124 IRQ_TYPE_EDGE_FALLING>; + device_type = "ethernet-phy"; + compatible = "ethernet-phy-ieee802.3-c22"; + }; + }; + }; -- 2.37.1