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Bottomley" , Krzysztof Kozlowski , Jinyoung Choi , Kiwoong Kim , open list References: <04f4949e4dea991a93bdf6727bf12948ecc586be.1662157846.git.quic_asutoshd@quicinc.com> <748f9c294e304cc5b5ccd9804fa647afc39c8bc3.camel@gmail.com> From: "Asutosh Das (asd)" In-Reply-To: <748f9c294e304cc5b5ccd9804fa647afc39c8bc3.camel@gmail.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: _InkazLZ6IYSn6AVwKFML1EFpSKnZzGW X-Proofpoint-ORIG-GUID: _InkazLZ6IYSn6AVwKFML1EFpSKnZzGW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-08_02,2022-09-07_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 bulkscore=0 impostorscore=0 adultscore=0 priorityscore=1501 mlxscore=0 spamscore=0 malwarescore=0 clxscore=1015 mlxlogscore=999 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2207270000 definitions=main-2209080008 X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_LOW, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello Bean Thanks for your comments. Responses inline. On 9/5/2022 6:48 AM, Bean Huo wrote: > On Fri, 2022-09-02 at 15:41 -0700, Asutosh Das wrote: >> +/** >> + * ufshcd_mcq_decide_queue_depth - decide the queue depth >> + * @hba - per adapter instance >> + * >> + * MAC - Max. Active Command of the Host Controller (HC) >> + * HC wouldn't send more than this commands to the device. >> + * The default MAC is 32, but the max. value may vary with >> + * vendor implementation. >> + * Calculates and adjusts the queue depth based on the depth >> + * supported by the HC, ufs device and if ext_iid is supported. >> + */ >> +u32 ufshcd_mcq_decide_queue_depth(struct ufs_hba *hba) >> +{ >> +       u32 qd, val; >> +       int mac; >> + >> +       mac = ufshcd_mcq_vops_get_hba_mac(hba); >> +       if (mac < 0) { >> +               val = ufshcd_readl(hba, REG_UFS_MCQ_CFG); >> +               mac = (val & MCQ_CFG_MAC_MASK) >> MCQ_CFG_MAC_OFFSET; >> +       } >> + >> +       /*  MAC is a 0 based value. */ >> +       mac += 1; >> +       qd = min_t(u32, mac, hba->dev_info.bqueuedepth); >> +       if (!qd) >> +               qd = mac; >> + >> +       /* Adjust queue depth based on ext_iid support. */ >> +       if (qd > 256 && (!hba->ext_iid_sup || !hba- >>> dev_info.b_ext_iid_en)) >> +               qd = 256; >> +       else if (qd > 4096 && hba->ext_iid_sup && hba- >>> dev_info.b_ext_iid_en) >> +               qd = 4096; >> + > > Astosh, > > I don't understand here. How can qd be 4096? MAC in UFSHCI is 9 bits > width, the maximum depth will be 512, and hba->dev_info.bqueuedepth is > one byte width, maximum will be 256. > Correct. The spec is fuzzy about it. Because ext_iid provides a provision to increase the Queue depth to 2^12. Even though the parameters that you referred to don't support it now. Will remove this part in the next version. > Kind regards, > Bean >