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From:   Jason Yen <jason.yen@paradetech.corp-partner.google.com>
Date:   Thu, 8 Sep 2022 11:05:03 +0800
Message-ID: <CAB7BMGzBU1K0LPgKozUYaawD7VJ=MvvxXMSHVzrmAV+qsuKD8A@mail.gmail.com>
Subject: Re: [PATCH] drm/bridge: ps8640: Add double reset T4 and T5 to
 power-on sequence
To:     Rock Chiu <rock.chiu@paradetech.corp-partner.google.com>
Cc:     Doug Anderson <dianders@chromium.org>,
        Hsin-Yi Wang <hsinyi@chromium.org>,
        Andrzej Hajda <andrzej.hajda@intel.com>,
        Neil Armstrong <narmstrong@baylibre.com>,
        Robert Foss <robert.foss@linaro.org>,
        Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
        Jonas Karlman <jonas@kwiboo.se>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        David Airlie <airlied@linux.ie>,
        Daniel Vetter <daniel@ffwll.ch>,
        dri-devel <dri-devel@lists.freedesktop.org>,
        LKML <linux-kernel@vger.kernel.org>
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The chip is functional ready 200ms after the chip reset. The 200ms is
mainly for loading firmware from spi rom.

-Jason


On Thu, Sep 8, 2022 at 8:32 AM Rock Chiu
<rock.chiu@paradetech.corp-partner.google.com> wrote:
>
> + Jason.
>
> -Rock
>
> Doug Anderson <dianders@chromium.org> =E6=96=BC 2022=E5=B9=B48=E6=9C=8830=
=E6=97=A5 =E9=80=B1=E4=BA=8C =E6=B8=85=E6=99=A85:49=E5=AF=AB=E9=81=93=EF=BC=
=9A
> >
> > Hi,
> >
> > On Mon, Aug 22, 2022 at 9:33 AM Doug Anderson <dianders@chromium.org> w=
rote:
> > >
> > > Hi,
> > >
> > > On Thu, Aug 18, 2022 at 8:03 AM Doug Anderson <dianders@chromium.org>=
 wrote:
> > > >
> > > > Hi,
> > > >
> > > > On Wed, Aug 17, 2022 at 8:22 PM Hsin-Yi Wang <hsinyi@chromium.org> =
wrote:
> > > > >
> > > > > On Thu, Aug 18, 2022 at 11:19 AM Rock Chiu
> > > > > <rock.chiu@paradetech.corp-partner.google.com> wrote:
> > > > > >
> > > > > > How does T4/T5  impact the real case? We talked previously the =
T4/T5
> > > > > > shouldn't cause user impact.
> > > > > > Do we have testing data from ODM?
> > > > > >
> > > > > Please leave comments below the previous comment's headline.
> > > > >
> > > > > I'm confused. The reason I upstreamed this patch is because this =
is in
> > > > > your application note and you asked us to help upstream it. Now d=
o you
> > > > > mean that we don't need T4 and T5?
> > > >
> > > > I think Rock is asking what problems the extra delay is causing. In
> > > > other words: why do we care about keeping these delays short?
> > > >
> > > > The answer is that it affects boot speed and also resume speed of
> > > > devices. Adding these two delays here means that there's an extra 1=
00
> > > > ms before the user can see something on the screen. That may not se=
em
> > > > like a lot, but those kinds of delays add up quickly. At least on
> > > > Chromebooks, booting quickly is always a big goal.
> > >
> > > While I'm not very happy with this change and I don't really
> > > understand why these delays need to be so long, if folks are really
> > > certain that we need them and can't make them shorter then I guess we
> > > can land it. I'll wait a few more days in case anyone wants to chime
> > > in with their thoughts.
> >
> > I'll continue to grumble, but I did push it.
> >
> > 55453c0914d9 drm/bridge: ps8640: Add double reset T4 and T5 to power-on=
 sequence
> >
> > I pushed to "drm-misc-next" and not "drm-misc-fixes". It doesn't feel
> > massively urgent since apparently we've been without the
> > "double-reset" for years and having the extra bake time feels like the
> > better way to lean.
> >
> > -Doug