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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id a8-20020a056512200800b00497a0ea92desm1421722lfb.135.2022.09.08.04.07.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 08 Sep 2022 04:07:33 -0700 (PDT) Message-ID: <2d4de63a-c536-669d-b90d-21f60bc6b6fb@linaro.org> Date: Thu, 8 Sep 2022 13:07:32 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 Subject: Re: [PATCH v2 1/3] dt-bindings: clock: gcc-sdm845: add sdm670 global clocks Content-Language: en-US To: Richard Acayan , linux-arm-msm@vger.kernel.org Cc: andersson@kernel.org, agross@kernel.org, konrad.dybcio@somainline.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, tdas@codeaurora.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, caleb@connolly.tech, jo@jsfamily.in References: <20220907223927.139858-1-mailingradian@gmail.com> <20220907223927.139858-2-mailingradian@gmail.com> From: Krzysztof Kozlowski In-Reply-To: <20220907223927.139858-2-mailingradian@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08/09/2022 00:39, Richard Acayan wrote: > The Snapdragon 670 clocks will be added into the sdm845 gcc driver. Most > of the new clocks, GDSCs, and resets already have reserved IDs but there > are some resources that don't. Add the new clock and extra BCR from > Snapdragon 670 and document the differences between the SoC parent clocks. > > Signed-off-by: Richard Acayan Thank you for your patch. There is something to discuss/improve. > '#clock-cells': > const: 1 > @@ -63,6 +57,46 @@ required: > - '#reset-cells' > - '#power-domain-cells' > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: qcom,gcc-sdm845 > + then: > + properties: > + clocks: > + items: > + - description: Board XO source > + - description: Board active XO source > + - description: Sleep clock source > + - description: PCIE 0 Pipe clock source > + - description: PCIE 1 Pipe clock source > + clock-names: > + items: > + - const: bi_tcxo > + - const: bi_tcxo_ao > + - const: sleep_clk > + - const: pcie_0_pipe_clk > + - const: pcie_1_pipe_clk Blank line here. With this: Reviewed-by: Krzysztof Kozlowski Best regards, Krzysztof