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From:   "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date:   Thu, 8 Sep 2022 13:13:27 +0100
Message-ID: <CA+V-a8vS_ozrbEC=JmRwMTQxwqsciPdoaVU=rbPK-=DpkhfP7A@mail.gmail.com>
Subject: Re: [RFC PATCH 1/2] riscv: vendors: andes: Add support to configure
 the PMA regions
To:     Conor Dooley <Conor.Dooley@microchip.com>
Cc:     guoren@linux.alibaba.com, atishp@atishpatra.org,
        "Lad, Prabhakar" <prabhakar.mahadev-lad.rj@bp.renesas.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Biju Das <biju.das.jz@bp.renesas.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>, atishp@rivosinc.com,
        apatel@ventanamicro.com,
        Geert Uytterhoeven <geert+renesas@glider.be>,
        linux-riscv <linux-riscv@lists.infradead.org>,
        Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
        LKML <linux-kernel@vger.kernel.org>
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On Thu, Sep 8, 2022 at 1:00 PM <Conor.Dooley@microchip.com> wrote:
>
> On 08/09/2022 12:50, Lad, Prabhakar wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> > Hi Guo,
> >
> >>> -----Original Message-----
> >>> From: Conor.Dooley@microchip.com <Conor.Dooley@microchip.com>
> >>> Sent: 08 September 2022 00:38
> >>> To: atishp@atishpatra.org
> >>> Cc: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>;
> >>> paul.walmsley@sifive.com; palmer@dabbelt.com; aou@eecs.berkeley.edu;
> >>> atishp@rivosinc.com; apatel@ventanamicro.com; geert+renesas@glider.be;
> >>> linux-riscv@lists.infradead.org; linux-renesas-soc@vger.kernel.org;
> >>> linux-kernel@vger.kernel.org; prabhakar.csengg@gmail.com; Biju Das
> >>> <biju.das.jz@bp.renesas.com>
> >>> Subject: Re: [RFC PATCH 1/2] riscv: vendors: andes: Add support to
> >>> configure the PMA regions
> >>>
> >>> On 07/09/2022 22:52, Atish Patra wrote:
> >>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know
> >>>> the content is safe
> >>>>
> >>>>
> >>>> On Tue, Sep 6, 2022 at 3:40 AM <Conor.Dooley@microchip.com
> >>>> <mailto:Conor.Dooley@microchip.com>> wrote:
> >>>>
> >>>> On 06/09/2022 11:21, Lad Prabhakar wrote:
> >>>>
> >>>>> diff --git a/arch/riscv/include/asm/sbi.h
> >>>>> b/arch/riscv/include/asm/sbi.h index 2a0ef738695e..10a7c855d125
> >>>>> 100644 --- a/arch/riscv/include/asm/sbi.h +++
> >>>>> b/arch/riscv/include/asm/sbi.h @@ -37,6 +37,7 @@ enum sbi_ext_id {
> >>>>>
> >>>>> /* Vendor extensions must lie within this range */
> >>>>> SBI_EXT_VENDOR_START = 0x09000000, +       SBI_EXT_ANDES =
> >>>>> 0x0900031E, SBI_EXT_VENDOR_END = 0x09FFFFFF, };
> >>>>
> > I am interested to know what is the status of your patch series [0].
> >
> > [0] https://lore.kernel.org/lkml/20210606143848.GA5983@lst.de/T/#m7f4c4cdfb92d6c8672bbfabebda729ce4700e177
>
> Heh, take a look at:
> git grep "ERRATA_THEAD*"
>
> This is all can-of-worms territory that we are heading to here, as
> the Zicbo* extensions is what is meant to be doing these sorts of
> things..
>
Aha thanks for the pointer.

Cheers,
Prabhakar