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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB3082.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: b0ca8124-4d76-41ef-70a7-08da91a44f09 X-MS-Exchange-CrossTenant-originalarrivaltime: 08 Sep 2022 14:13:31.2873 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: DVM41FTMasiKpE24sjZTRelXuVDMNbBiBnYEPBm3pLcVoxN5XAY6TIxAyDhO4VQY X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB5510 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org [AMD Official Use Only - General] > -----Original Message----- > From: Marc Zyngier > Sent: Wednesday, September 7, 2022 6:48 PM > To: Gupta, Nipun > Cc: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; > gregkh@linuxfoundation.org; rafael@kernel.org; eric.auger@redhat.com; > alex.williamson@redhat.com; cohuck@redhat.com; Gupta, Puneet (DCG- > ENG) ; song.bao.hua@hisilicon.com; > mchehab+huawei@kernel.org; f.fainelli@gmail.com; > jeffrey.l.hugo@gmail.com; saravanak@google.com; > Michael.Srba@seznam.cz; mani@kernel.org; yishaih@nvidia.com; > jgg@ziepe.ca; jgg@nvidia.com; robin.murphy@arm.com; will@kernel.org; > joro@8bytes.org; masahiroy@kernel.org; ndesaulniers@google.com; linux- > arm-kernel@lists.infradead.org; linux-kbuild@vger.kernel.org; linux- > kernel@vger.kernel.org; devicetree@vger.kernel.org; kvm@vger.kernel.org; > okaya@kernel.org; Anand, Harpreet ; Agarwal, > Nikhil ; Simek, Michal ; > Radovanovic, Aleksandar ; git (AMD- > Xilinx) > Subject: Re: [RFC PATCH v3 4/7] bus/cdx: add cdx-MSI domain with gic-its > domain as parent >=20 > [CAUTION: External Email] >=20 > On Tue, 06 Sep 2022 14:47:58 +0100, > Nipun Gupta wrote: > > > > Devices on cdx bus are dynamically detected and registered using > > platform_device_register API. As these devices are not linked to > > of node they need a separate MSI domain for handling device ID > > to be provided to the GIC ITS domain. > > > > This also introduces APIs to alloc and free IRQs for CDX domain. > > > > Signed-off-by: Nipun Gupta > > Signed-off-by: Nikhil Agarwal > > --- > > drivers/bus/cdx/cdx.c | 18 +++ > > drivers/bus/cdx/cdx.h | 19 +++ > > drivers/bus/cdx/cdx_msi.c | 236 > +++++++++++++++++++++++++++++++++++ > > drivers/bus/cdx/mcdi_stubs.c | 1 + > > include/linux/cdx/cdx_bus.h | 19 +++ > > 5 files changed, 293 insertions(+) > > create mode 100644 drivers/bus/cdx/cdx_msi.c > > <..> > > + return; > > + > > + msi_domain_free_irqs(msi_domain, dev); > > +} > > +EXPORT_SYMBOL(cdx_msi_domain_free_irqs); >=20 > This feels like a very pointless helper, and again a copy/paste from > the FSL code. I'd rather you change msi_domain_free_irqs() to only > take a device and use the implicit MSI domain. I agree with other comments except this one. In current implementation we have an API "cdx_msi_domain_alloc_irqs()", so having "cdx_msi_domain_free_irqs()" seems legitimate, as the caller would allocate and free MSI's using a similar APIs (cdx_msi_domain*). Changing msi_domain_free_irqs() to use implicit msi domain in case msi_domain is not provided by the caller seems appropriate, Ill change the same for "msi_domain_alloc_irqs()" too. <..> > > diff --git a/drivers/bus/cdx/mcdi_stubs.c b/drivers/bus/cdx/mcdi_stubs.= c > > index cc9d30fa02f8..2c8db1f5a057 100644 > > --- a/drivers/bus/cdx/mcdi_stubs.c > > +++ b/drivers/bus/cdx/mcdi_stubs.c > > @@ -45,6 +45,7 @@ int cdx_mcdi_get_func_config(struct cdx_mcdi_t > *cdx_mcdi, > > dev_params->res_count =3D 2; > > > > dev_params->req_id =3D 0x250; > > + dev_params->num_msi =3D 4; >=20 > Why the hardcoded 4? Is that part of the firmware emulation stuff? Yes, this is currently part of emulation, and would change with proper emulation support. >=20 > M. >=20 > -- > Without deviation from the norm, progress is not possible.