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From:   <Conor.Dooley@microchip.com>
To:     <zong.li@sifive.com>, <robh+dt@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <palmer@dabbelt.com>,
        <paul.walmsley@sifive.com>, <aou@eecs.berkeley.edu>,
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Subject: Re: [PATCH v3 3/6] soc: sifive: ccache: determine the cache level
 from dts
Thread-Topic: [PATCH v3 3/6] soc: sifive: ccache: determine the cache level
 from dts
Thread-Index: AQHYw5GXUivIqG0dYUesCVnSc8fMJq3V2m+A
Date:   Thu, 8 Sep 2022 18:28:28 +0000
Message-ID: <632b2853-1543-e3ba-b34f-39f3f4fdaddc@microchip.com>
References: <20220908144424.4232-1-zong.li@sifive.com>
 <20220908144424.4232-4-zong.li@sifive.com>
In-Reply-To: <20220908144424.4232-4-zong.li@sifive.com>
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