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From:   <Conor.Dooley@microchip.com>
To:     <mturquette@baylibre.com>, <sboyd@kernel.org>,
        <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
        <palmer@dabbelt.com>, <Daire.McNamara@microchip.com>
CC:     <paul.walmsley@sifive.com>, <aou@eecs.berkeley.edu>,
        <Claudiu.Beznea@microchip.com>, <linux-clk@vger.kernel.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v5 00/14] PolarFire SoC reset controller & clock cleanups
Thread-Topic: [PATCH v5 00/14] PolarFire SoC reset controller & clock cleanups
Thread-Index: AQHYxEgnw2pJ1u5LQEyPiH1+3wfi663XCHuA
Date:   Fri, 9 Sep 2022 12:34:58 +0000
Message-ID: <d100f6af-e6d6-1ff4-f6e2-d987a02e5310@microchip.com>
References: <20220909123123.2699583-1-conor.dooley@microchip.com>
In-Reply-To: <20220909123123.2699583-1-conor.dooley@microchip.com>
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