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From:   Adam Skladowski <a39.skl@gmail.com>
Cc:     phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht,
        Adam Skladowski <a39.skl@gmail.com>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Konrad Dybcio <konrad.dybcio@somainline.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 0/2] Add DISPCC driver for SM6115
Date:   Sun, 11 Sep 2022 18:46:17 +0200
Message-Id: <20220911164635.182973-1-a39.skl@gmail.com>
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This patch series introduce support for SM6115 display clock controller,
this driver is based on QCM2290 one.

Changes since v1
================
1. Changed bindings file names to Vendor,SoC-IP format.
2. Changed include in dispcc-sm6115 to reflect name change of bindings.

Changes since v2
================
1. Changed maintainer email.
2. Converted driver to use .index instead of fw_name.
3. Removed parents which had no passed clock.
4. Updated YAML to reflect changes above.
5. Adjusted driver based on Bjorn's feedback.

Adam Skladowski (2):
  dt-bindings: clock: add QCOM SM6115 display clock bindings
  clk: qcom: Add display clock controller driver for SM6115

 .../bindings/clock/qcom,sm6115-dispcc.yaml    |  70 ++
 drivers/clk/qcom/Kconfig                      |   9 +
 drivers/clk/qcom/Makefile                     |   1 +
 drivers/clk/qcom/dispcc-sm6115.c              | 608 ++++++++++++++++++
 .../dt-bindings/clock/qcom,sm6115-dispcc.h    |  36 ++
 5 files changed, 724 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml
 create mode 100644 drivers/clk/qcom/dispcc-sm6115.c
 create mode 100644 include/dt-bindings/clock/qcom,sm6115-dispcc.h

-- 
2.25.1