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From:   Siddharth Vadapalli <s-vadapalli@ti.com>
To:     <robh+dt@kernel.org>, <lee.jones@linaro.org>,
        <krzysztof.kozlowski@linaro.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <kishon@ti.com>,
        <vkoul@kernel.org>, <dan.carpenter@oracle.com>,
        <grygorii.strashko@ti.com>, <rogerq@kernel.org>
CC:     <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-phy@lists.infradead.org>,
        <linux-arm-kernel@lists.infradead.org>, <s-vadapalli@ti.com>
Subject: [PATCH v5 0/3] Add support for QSGMII mode
Date:   Mon, 12 Sep 2022 14:26:47 +0530
Message-ID: <20220912085650.83263-1-s-vadapalli@ti.com>
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Add compatible for J7200 CPSW5G.

Add support for QSGMII mode in phy-gmii-sel driver for CPSW5G in J7200.

Change log:

v4 -> v5:
1. Undo cleanup changes in the example in:
   Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml, moving it
   to a separate patch in the same series. The cleanup patch is the first
   patch in this series, with the other patches from previous versions
   following it in the same order.
2. Update $ref to "/schemas/phy/ti,phy-gmii-sel.yaml#" in:
   Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml.
3. Update description for the "phy@[0-9a-f]+$" pattern property.
4. Add blank lines in between IF/THEN statements in:
   Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml.
5. Update the IF/THEN statement corresponding to the property
   "ti,qsgmii-main-ports", disallowing the property for all compatibles
   except "ti,j7200-cpsw5g-phy-gmii-sel" in:
   Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml.
6. Move "maxItems: 1" to the top where "ti,qsgmii-main-ports" property is
   first defined, in:
   Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml.

v3 -> v4:
1. Update $ref to /schemas/phy/phy-provider.yaml in
   Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml.
2. Update commit message for the "phy: ti: gmii-sel: Add support for
   CPSW5G GMII SEL in J7200" patch, describing the reason for defining the
   property "ti,qsgmii-main-ports" as an array.
3. Add a check in drivers/phy/ti/phy-gmii-sel.c to ensure that the value
   of the variable "main_ports" is within bounds. If the property
   "ti,qsgmii-main-ports" is either not mentioned in the devicetree or the
   value of the property is out of bounds, in both these cases,
   "main_ports" defaults to 1.
4. Use the function "of_property_read_u32()" instead of the function
   "of_property_read_u32_array()" in drivers/phy/ti/phy-gmii-sel.c.

v2 -> v3:
1. Add $ref to "phy@[0-9a-f]+$" pattern property in
   Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml.
2. Restrict the optional ti,qsgmii-main-ports property to
   ti,j7200-cpsw5g-phy-gmii-sel property by adding an else statement and
   disallowing it for other compatibles.
3. Move the "items" constraint for the ti,qsgmii-main-ports property to
   the place the property is defined.

v1 -> v2:
1. Rename ti,enet-ctrl-qsgmii as ti,qsgmii-main-ports.
2. Change ti,qsgmii-main-ports property from bitmask to integer.
3. Update commit message with property name as ti,qsgmii-main-ports.

v4: https://lore.kernel.org/r/20220901085506.138633-1-s-vadapalli@ti.com/
v3: https://lore.kernel.org/r/20220822065631.27933-1-s-vadapalli@ti.com/
v2: https://lore.kernel.org/r/20220816055848.111482-1-s-vadapalli@ti.com/
v1: https://lore.kernel.org/r/20220531111221.22963-1-s-vadapalli@ti.com/

Siddharth Vadapalli (3):
  dt-bindings: phy: ti: phy-gmii-sel: Cleanup example
  dt-bindings: phy: ti: phy-gmii-sel: Add bindings for J7200
  phy: ti: gmii-sel: Add support for CPSW5G GMII SEL in J7200

 .../mfd/ti,j721e-system-controller.yaml       |  6 +++
 .../bindings/phy/ti,phy-gmii-sel.yaml         | 27 ++++++++++-
 drivers/phy/ti/phy-gmii-sel.c                 | 47 +++++++++++++++++--
 3 files changed, 76 insertions(+), 4 deletions(-)

-- 
2.25.1