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From:   "Alim Akhtar" <alim.akhtar@samsung.com>
To:     "'SEO HOYOUNG'" <hy50.seo@samsung.com>,
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        <bvanassche@acm.org>, <bhoon95.kim@samsung.com>,
        <kwmad.kim@samsung.com>
In-Reply-To: <20220912140000.95483-1-hy50.seo@samsung.com>
Subject: RE: [PATCH v1] scsi: ufs: add a variant operation in struct
 ufs_hba_variant_ops
Date:   Tue, 13 Sep 2022 09:49:24 +0530
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References: <CGME20220913021716epcas2p1efd3b034f92e0e6df1544f067acbe73f@epcas2p1.samsung.com>
        <20220912140000.95483-1-hy50.seo@samsung.com>
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>-----Original Message-----
>From: SEO HOYOUNG =5Bmailto:hy50.seo=40samsung.com=5D
>Sent: Monday, September 12, 2022 7:30 PM
>To: linux-scsi=40vger.kernel.org; linux-kernel=40vger.kernel.org;
>alim.akhtar=40samsung.com; avri.altman=40wdc.com; jejb=40linux.ibm.com;
>martin.petersen=40oracle.com; beanhuo=40micron.com;
>asutoshd=40codeaurora.org; cang=40codeaurora.org; bvanassche=40acm.org;
>bhoon95.kim=40samsung.com; kwmad.kim=40samsung.com
>Cc: SEO HOYOUNG <hy50.seo=40samsung.com>
>Subject: =5BPATCH v1=5D scsi: ufs: add a variant operation in struct
>ufs_hba_variant_ops
>
>Add ufs_hba_variant_ops about vendor error in check_error.
>It need to reset when occurred ah8 related error.
>At that time could not recovery with pwr cmd.
>So add vendor error check function at ufs_hba_variant_ops.
>
I didn't understand why you need this, looks like you are using AH8.
So IS (interrupt status) bit=5B5=5D, bit=5B6=5D , HIBERNATE_EXIT and HIBERN=
ATE_ENTRY should still give you the error status?


>Change-Id: I24c76a372931e702b357c86a5dc36e93ce4b5fda
This is something unwanted

>Signed-off-by: SEO HOYOUNG <hy50.seo=40samsung.com>
>---
> drivers/ufs/core/ufshcd-priv.h =7C  7 +++++++
> drivers/ufs/core/ufshcd.c      =7C  2 ++
> drivers/ufs/host/ufs-exynos.c  =7C 19 +++++++++++++++++++
> include/ufs/ufshcd.h           =7C  1 +
> 4 files changed, 29 insertions(+)
>
>diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv=
.h
>index d00dba17297d..6172da4d3484 100644
>--- a/drivers/ufs/core/ufshcd-priv.h
>+++ b/drivers/ufs/core/ufshcd-priv.h
>=40=40 -221,6 +221,13 =40=40 static inline void
>ufshcd_vops_config_scaling_param(struct ufs_hba *hba,
> 		hba->vops->config_scaling_param(hba, p, data);  =7D
>
>+static inline void ufshcd_vops_check_int_error(struct ufs_hba *hba,
>+					       bool *queue_eh_work)
>+=7B
>+	if (hba->vops & hba->vops->check_int_error)
>+		hba->vops->check_int_error(hba, queue_eh_work); =7D
>+
> extern const struct ufs_pm_lvl_states ufs_pm_lvl_states=5B=5D;
>
> /**
>diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index
>7c15cbc737b4..39ee5192f26a 100644
>--- a/drivers/ufs/core/ufshcd.c
>+++ b/drivers/ufs/core/ufshcd.c
>=40=40 -6542,6 +6542,8 =40=40 static irqreturn_t ufshcd_check_errors(struc=
t
>ufs_hba *hba, u32 intr_status)
> 		queue_eh_work =3D true;
> 	=7D
>
>+	ufshcd_vops_check_int_error(hba, &queue_eh_work);
>+
> 	if (queue_eh_work) =7B
> 		/*
> 		 * update the transfer error masks to sticky bits, let's do this
>diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c
>index eced97538082..b351b8e48b08 100644
>--- a/drivers/ufs/host/ufs-exynos.c
>+++ b/drivers/ufs/host/ufs-exynos.c
>=40=40 -67,6 +67,10 =40=40
> =23define CLK_CTRL_EN_MASK	(REFCLK_CTRL_EN =7C=5C
> 				 UNIPRO_PCLK_CTRL_EN =7C=5C
> 				 UNIPRO_MCLK_CTRL_EN)
>+
>+=23define HCI_AH8_STATE		0x50C
>+=23define HCI_AH8_STATE_ERROR	BIT(16)
>+
> /* Device fatal error */
> =23define DFES_ERR_EN		BIT(31)
> =23define DFES_DEF_L2_ERRS	(UIC_DATA_LINK_LAYER_ERROR_RX_BUF_OF
>=7C=5C
>=40=40 -1376,6 +1380,20 =40=40 static void exynos_ufs_hibern8_notify(struc=
t
>ufs_hba *hba,
> 	=7D
> =7D
>
>+static void exynos_ufs_check_int_error(struct ufs_hba *hba, bool
>+*queue_eh_work) =7B
>+	struct exynos_ufs *ufs =3D ufshcd_get_variant(hba);
>+
>+	if (ufshcd_is_auto_hibern8_supported(hba)) =7B
>+		val =3D hci_readl(ufs, HCI_AH8_STATE);
>+
>+		if (val & HCI_AH8_STATE_ERROR) =7B
>+			 ufshcd_set_link_broken(hba);
>+			 queue_eh_work =3D true;
>+		=7D
>+	=7D
>+=7D
>+
> static int exynos_ufs_suspend(struct ufs_hba *hba, enum ufs_pm_op
>pm_op,
> 	enum ufs_notify_change_status status)
> =7B
>=40=40 -1569,6 +1587,7 =40=40 static const struct ufs_hba_variant_ops
>ufs_hba_exynos_ops =3D =7B
> 	.setup_xfer_req			=3D
>exynos_ufs_specify_nexus_t_xfer_req,
> 	.setup_task_mgmt		=3D
>exynos_ufs_specify_nexus_t_tm_req,
> 	.hibern8_notify			=3D exynos_ufs_hibern8_notify,
>+	.check_int_error		=3D exynos_ufs_check_int_error,
> 	.suspend			=3D exynos_ufs_suspend,
> 	.resume				=3D exynos_ufs_resume,
> =7D;
>diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index
>24c97e0772bb..40078c4b9f55 100644
>--- a/include/ufs/ufshcd.h
>+++ b/include/ufs/ufshcd.h
>=40=40 -335,6 +335,7 =40=40 struct ufs_hba_variant_ops =7B
> 			       const union ufs_crypto_cfg_entry *cfg, int slot);
> 	void	(*event_notify)(struct ufs_hba *hba,
> 				enum ufs_event_type evt, void *data);
>+	void	(*check_int_error)(struct ufs_hba *hba, bool
>*queue_eh_work);
> =7D;
>
> /* clock gating state  */
>--
>2.26.0