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Date:   Tue, 13 Sep 2022 11:05:21 +0200
From:   Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= <u.kleine-koenig@pengutronix.de>
To:     xinlei.lee@mediatek.com
Cc:     thierry.reding@gmail.com, matthias.bgg@gmail.com,
        jitao.shi@mediatek.com, linux-pwm@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
        Project_Global_Chrome_Upstream_Group@mediatek.com
Subject: Re: [PATCH] pwm: mtk-disp: Fix the parameters calculated  by the
 enabled flag of disp_pwm.
Message-ID: <20220913090521.6ybohvgbehua4rgv@pengutronix.de>
References: <1661745852-27323-1-git-send-email-xinlei.lee@mediatek.com>
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Hello,

On Mon, Aug 29, 2022 at 12:04:12PM +0800, xinlei.lee@mediatek.com wrote:
> From: xinlei lee <xinlei.lee@mediatek.com>
>=20
> In the original mtk_disp_pwm_get_state() function, the result of reading
> con0 & BIT(0) is enabled as disp_pwm.=20
> In order to conform to the register table, we should use the disp_pwm=20
> base address as the enabled judgment.

Do you want to say:

	The enable bit of the hardware is bit 0 of the DISP_PWM_EN
	register at offset 0 for all supported hardwares. Up to now the
	bit was wrongly assumed to be in the CON0 register.

?

> Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API .get_state()")
>=20

This newline is unusal.

> Signed-off-by: xinlei lee <xinlei.lee@mediatek.com>
> Reviewed-by: Miles Chen <miles.chen@mediatek.com>
> ---
> Base on the branch of Linux-next/master.
> Split from series [1].
> [1] https://patchwork.kernel.org/project/linux-mediatek/cover/1661239875-=
19841-1-git-send-email-xinlei.lee@mediatek.com/
> ---
> ---
>  drivers/pwm/pwm-mtk-disp.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c
> index c605013..50425cd 100644
> --- a/drivers/pwm/pwm-mtk-disp.c
> +++ b/drivers/pwm/pwm-mtk-disp.c
> @@ -197,7 +197,7 @@ static void mtk_disp_pwm_get_state(struct pwm_chip *c=
hip,
>  	rate =3D clk_get_rate(mdp->clk_main);
>  	con0 =3D readl(mdp->base + mdp->data->con0);
>  	con1 =3D readl(mdp->base + mdp->data->con1);
> -	state->enabled =3D !!(con0 & BIT(0));
> +	state->enabled =3D !!(readl(mdp->base) & BIT(0));

I would expect this to better be:

	state->enabled =3D !!(readl(mdp->base + DISP_PWM_EN) & BIT(0));

which is the same for the compiler but a bit more descriptive for the
human reader.

>  	clk_div =3D FIELD_GET(PWM_CLKDIV_MASK, con0);
>  	period =3D FIELD_GET(PWM_PERIOD_MASK, con1);
>  	/*

Best regards
Uwe

--=20
Pengutronix e.K.                           | Uwe Kleine-K=F6nig            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

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