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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id p7-20020a056870830700b0011d23ed5365sm7900993oae.43.2022.09.13.18.47.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Sep 2022 18:47:02 -0700 (PDT) Received: (nullmailer pid 909955 invoked by uid 1000); Wed, 14 Sep 2022 01:47:01 -0000 Date: Tue, 13 Sep 2022 20:47:01 -0500 From: Rob Herring To: Krzysztof Kozlowski Cc: Manivannan Sadhasivam , Andy Gross , Bjorn Andersson , Konrad Dybcio , Bjorn Helgaas , Krzysztof Kozlowski , linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam Subject: Re: [PATCH] dt-bindings: pci: qcom,pcie-ep: correct qcom,perst-regs Message-ID: <20220914014701.GA853152-robh@kernel.org> References: <20220911135547.23106-1-krzysztof.kozlowski@linaro.org> <11e61fa5-f770-9c9f-23b9-3d1dcb205bc5@linaro.org> <20220913152054.GA3736444-robh@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 13, 2022 at 06:25:49PM +0200, Krzysztof Kozlowski wrote: > On 13/09/2022 17:20, Rob Herring wrote: > > On Sun, Sep 11, 2022 at 04:14:54PM +0200, Krzysztof Kozlowski wrote: > >> On 11/09/2022 15:55, Krzysztof Kozlowski wrote: > >>> qcom,perst-regs is an phandle array of one item with a phandle and its > >>> arguments. > >>> > >>> Signed-off-by: Krzysztof Kozlowski > >>> --- > >>> Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 6 ++++-- > >>> 1 file changed, 4 insertions(+), 2 deletions(-) > >>> > >>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > >>> index 3d23599e5e91..077e002b07d3 100644 > >>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > >>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml > >>> @@ -60,8 +60,10 @@ properties: > >>> enable registers > >>> $ref: "/schemas/types.yaml#/definitions/phandle-array" > >>> items: > >>> - minItems: 3 > >>> - maxItems: 3 > >>> + - items: > >>> + - description: Syscon to TCSR system registers > >>> + - description: Perst enable offset > >>> + - description: Perst separateion enable offset > >> > >> Unfortunately this still complains: > >> > >> qcom-sdx55-t55.dtb: pcie-ep@40000000: qcom,perst-regs:0: [28] is too short > >> > >> > >> where 28 is the phandle... > > > > Meaning the dt is wrong or there's a tooling issue? > > I think tooling issue. I looked at this many times and code (schema and > DTS) seems to be correct, but tool doesn't like it. Okay, I found the issue. Will test it a bit more and apply it tomorrow. Rob