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Date:   Wed, 14 Sep 2022 13:19:31 +0200
From:   "Arnd Bergmann" <arnd@arndb.de>
To:     "Neil Armstrong" <narmstrong@baylibre.com>,
        "Mark Brown" <broonie@kernel.org>
Cc:     linux-spi@vger.kernel.org, linux-amlogic@lists.infradead.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] spi: meson-spicc: add support for DMA
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On Tue, Sep 13, 2022, at 4:03 PM, Neil Armstrong wrote:

> +static void meson_spicc_setup_dma_burst(struct meson_spicc_device *spicc)
> +{
...
> +	/* Setup burst length */
> +	writel_relaxed(ld_ctr1, spicc->base + SPICC_LD_CNTL1);
> +
> +	writel_relaxed(SPICC_DMA_ENABLE | SPICC_DMA_URGENT |
> +		       FIELD_PREP(SPICC_TXFIFO_THRESHOLD_MASK, txfifo_thres) |
> +		       FIELD_PREP(SPICC_READ_BURST_MASK, read_req) |
> +		       FIELD_PREP(SPICC_RXFIFO_THRESHOLD_MASK, rxfifo_thres) |
> +		       FIELD_PREP(SPICC_WRITE_BURST_MASK, write_req),
> +		       spicc->base + SPICC_DMAREG);
> +}

It looks like this last writel_relaxed() starts the DMA, but I don't
see any barrier that serializes it against the memory access, which
could still be in a store buffer.

> + /* Sometimes, TC gets triggered while the RX fifo isn't fully flushed *
> + if (spicc->using_dma) {
> +          unsigned int rxfifo_count = FIELD_GET(SPICC_RXCNT_MASK,
> +                       readl_relaxed(spicc->base + SPICC_TESTREG));

Same here in the interrupt controller, I don't see anything enforcing
the DMA to actually complete before the readl_relaxed().

At the very minimum, I think these two have to use non-relaxed
accessors when adding DMA support, but an easier approach would
be to use those consistently throughout the driver.

     Arnd