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References: <20220914052742.116297-1-jiapeng.chong@linux.alibaba.com> <20220914052742.116297-8-jiapeng.chong@linux.alibaba.com>
In-Reply-To: <20220914052742.116297-8-jiapeng.chong@linux.alibaba.com>
From:   Alex Deucher <alexdeucher@gmail.com>
Date:   Wed, 14 Sep 2022 10:00:04 -0400
Message-ID: <CADnq5_NmWKF+7UQov2oQ2JH5UW0Pzjw0bCUzhZWZQ=xH2mu17g@mail.gmail.com>
Subject: Re: [PATCH 8/8] drm/amd/display: make optc32_phantom_crtc_post_enable,
 optc32_setup_manual_trigger and optc32_set_drr static
To:     Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Cc:     alexander.deucher@amd.com, airlied@linux.ie, Xinhui.Pan@amd.com,
        Abaci Robot <abaci@linux.alibaba.com>,
        linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
        amd-gfx@lists.freedesktop.org, christian.koenig@amd.com
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Applied the series.  Thanks!

Alex

On Wed, Sep 14, 2022 at 1:29 AM Jiapeng Chong
<jiapeng.chong@linux.alibaba.com> wrote:
>
> These three functions are not used outside the function
> dcn32_optc.c, so the modification is defined as static.
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_optc.c:159:6: warnin=
g: no previous prototype for function 'optc32_phantom_crtc_post_enable'.
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_optc.c:218:6: warnin=
g: no previous prototype for =E2=80=98optc32_set_drr=E2=80=99.
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_optc.c:193:6: warnin=
g: no previous prototype for =E2=80=98optc32_setup_manual_trigger=E2=80=99.
>
> Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=3D2140
> Reported-by: Abaci Robot <abaci@linux.alibaba.com>
> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
> ---
>  drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c b/drivers/=
gpu/drm/amd/display/dc/dcn32/dcn32_optc.c
> index 1fad7b48bd5b..ec3989d37086 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c
> @@ -156,7 +156,7 @@ static bool optc32_disable_crtc(struct timing_generat=
or *optc)
>         return true;
>  }
>
> -void optc32_phantom_crtc_post_enable(struct timing_generator *optc)
> +static void optc32_phantom_crtc_post_enable(struct timing_generator *opt=
c)
>  {
>         struct optc *optc1 =3D DCN10TG_FROM_TG(optc);
>
> @@ -190,7 +190,7 @@ static void optc32_set_odm_bypass(struct timing_gener=
ator *optc,
>         optc1->opp_count =3D 1;
>  }
>
> -void optc32_setup_manual_trigger(struct timing_generator *optc)
> +static void optc32_setup_manual_trigger(struct timing_generator *optc)
>  {
>         struct optc *optc1 =3D DCN10TG_FROM_TG(optc);
>         struct dc *dc =3D optc->ctx->dc;
> @@ -215,7 +215,7 @@ void optc32_setup_manual_trigger(struct timing_genera=
tor *optc)
>         }
>  }
>
> -void optc32_set_drr(
> +static void optc32_set_drr(
>         struct timing_generator *optc,
>         const struct drr_params *params)
>  {
> --
> 2.20.1.7.g153144c
>