Received: by 2002:a05:6358:489b:b0:bb:da1:e618 with SMTP id x27csp8227709rwn; Wed, 14 Sep 2022 10:53:25 -0700 (PDT) X-Google-Smtp-Source: AA6agR7gzBoXj7IbLGFVV1cGTtgYOiZklH3p1/f7J/fVXNTMjD/okmX3lLKHmPvSCn+q6bmyijVO X-Received: by 2002:a17:906:cc4e:b0:77c:b7a:9de6 with SMTP id mm14-20020a170906cc4e00b0077c0b7a9de6mr12992217ejb.531.1663178005293; Wed, 14 Sep 2022 10:53:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663178005; cv=none; d=google.com; s=arc-20160816; b=vDmp0n5nMBF+cnBXb/nC5+Q95+REEhFy85+T/FHyplSgwXGKxdSa4s9up+Yg3A2ZCO KJ/gTk4GI1p2x0YuKIr6Zpv8BumkSXzu1YkXPK32a9Kp/mZ5uQ9RMpGiD9m/LfEfb3gq Z3/JZshfq60kvyucGMjyZBNPchJkINIW3+A3nOPBr1/YI0zfDuL7wv9AeZEZV9vG6k/b kjph0WS6kwGsKzCpwaLH8a+c9KZ1fsmJnTe6F0jBnUKN9objgy0RIwVYqQnmfQGTdUCn mKRQuFAmdgKKhOnMq8XFhKt3kfaSpXJH/b3/+JM7AjtZsWp3W1gPLXOzdFoK0GNDCx4X lANg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=L6YhEh0UYxe2tPeB9Bs5zIhc3gbVkQ/Hoe4Ilc/R8DI=; b=bz9GIiS9b6V9cCrk16eMYT/azQR5rTASb9wPuikiOrzeXdhEV4J+wkm70Obgu1r77R xwRtfNyHW9iM9REPdG4UERjCTqpoN/loHZOZHpKFLzLvNWNgBNzrE4LLTP12uEVsPajo kks+wPRuQEnvjTAI/EWvF9VigFyxQQQQicD7T6VaBx/LM89Dm7Q7L6ZFCUGUQsJdEHoY ajAj6/ZfHT3dN0DlBgL0nX2E07fJgmpY+ta87Ho3NxhLshq/yLS/qnKzPGRZwwWysxin cuqiGNbfrlf9JsMa0Z26Fxloc4TIxDlfoDIBOvgeYhXfrxnXoZELPcVowj0Z3IgVVKY/ MVkQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gateworks-com.20210112.gappssmtp.com header.s=20210112 header.b=zapowfML; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id dt19-20020a170907729300b0073182a31719si78474ejc.37.2022.09.14.10.52.59; Wed, 14 Sep 2022 10:53:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@gateworks-com.20210112.gappssmtp.com header.s=20210112 header.b=zapowfML; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229630AbiINRKH (ORCPT + 99 others); Wed, 14 Sep 2022 13:10:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229518AbiINRKG (ORCPT ); Wed, 14 Sep 2022 13:10:06 -0400 Received: from mail-oa1-x36.google.com (mail-oa1-x36.google.com [IPv6:2001:4860:4864:20::36]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DDD4321E1D for ; Wed, 14 Sep 2022 10:10:03 -0700 (PDT) Received: by mail-oa1-x36.google.com with SMTP id 586e51a60fabf-12b542cb1d3so32992660fac.13 for ; Wed, 14 Sep 2022 10:10:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gateworks-com.20210112.gappssmtp.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date; bh=L6YhEh0UYxe2tPeB9Bs5zIhc3gbVkQ/Hoe4Ilc/R8DI=; b=zapowfMLZG6nfuKhIaOEKqurE8nHf+m0lG9E4Hi9bjj0S0ZyKLFdodnrgeUZtOI0rb vTmX8K6g2kmX7rUtUMjnImvjBJMi22CluiHOAjhxG7L4H8xlKr+xbg1kZRoGZvSGJw8K HPRNo7jozmxDWJP68L5vaf5tLCfvQGqxodV4UV0D/3BVEn3M+YxepKAm7UlhCgfRpZNo UvTqcd1UP5IMAQo6z2XRKT1Yh9/gUuUq2ZgJCRRDOecB4oX+7Ai3EtR1zJ2xeqimnTK4 yB5oIda938tiCaV6kurWJy0tuIHeeiwb41hkYaiYwkux2cCCQ9DBESndrpUaruy9AxQq MY9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date; bh=L6YhEh0UYxe2tPeB9Bs5zIhc3gbVkQ/Hoe4Ilc/R8DI=; b=T1TW6nn9CcbD97y9pMFNafdTUnWBYxDrCjhc81xHEUEmUWPctAUiKhyks1i6I7W/t9 wj3OhonK/fZafatkNug73wCW9+wzo0szsf+jPxi8jyVjMf5HjpEWpCC2OMoG0/0NzcYP +ngtMnwms8yqNyNwPu51yC9N/uRi8HSgG8K4T/9wWtmWH3EQFCYe8cw+Jw/dsTzPqVMw aRpY14auzgVLFaw3BGm+wEiHHlzj66F0ZEFWMmCO8jhp3mWsI1l31VFV2PHeXdR2OU2k qhtBBajFFUwIOVB+cJJDgZY5KapgBwnznY48BV5NjH/KSQp9fk7CplxKqWUxY4+A24te 9hTg== X-Gm-Message-State: ACgBeo2YlnHWq3ED3ftAaCJ99vYiKMLXNjGebQOhwXzt4GOs9BeS72Dg PZ8TbpbT1Oxpj+BDJrz20qTOrQeH0VC+MAIjjwvHcg== X-Received: by 2002:a05:6808:1444:b0:344:f010:27d8 with SMTP id x4-20020a056808144400b00344f01027d8mr2273353oiv.33.1663175403154; Wed, 14 Sep 2022 10:10:03 -0700 (PDT) MIME-Version: 1.0 References: <20220908154903.4100386-1-tharvey@gateworks.com> <2530681.Lt9SDvczpP@steina-w> In-Reply-To: From: Tim Harvey Date: Wed, 14 Sep 2022 10:09:51 -0700 Message-ID: Subject: Re: [PATCH] arm64: dts: imx8mp-venice-gw74xx: add PCIe support To: Shawn Guo Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, NXP Linux Team , Fabio Estevam , Pengutronix Kernel Team , Sascha Hauer , Krzysztof Kozlowski , Rob Herring , Alexander Stein Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 9, 2022 at 10:42 AM Tim Harvey wrote: > > On Thu, Sep 8, 2022 at 10:59 PM Alexander Stein > wrote: > > > > Hi Tim, > > > > Am Donnerstag, 8. September 2022, 17:49:03 CEST schrieb Tim Harvey: > > > Add PCIe support on the Gateworks GW74xx board. While at it, > > > fix the related gpio line names from the previous incorrect values. > > > > > > Signed-off-by: Tim Harvey > > > --- > > > .../dts/freescale/imx8mp-venice-gw74xx.dts | 40 +++++++++++++++++-- > > > 1 file changed, 37 insertions(+), 3 deletions(-) > > > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts > > > b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts index > > > e0fe356b662d..7644db61d631 100644 > > > --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts > > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts > > > @@ -8,6 +8,7 @@ > > > #include > > > #include > > > #include > > > +#include > > > > > > #include "imx8mp.dtsi" > > > > > > @@ -100,6 +101,12 @@ led-1 { > > > }; > > > }; > > > > > > + pcie0_refclk: pcie0-refclk { > > > + compatible = "fixed-clock"; > > > + #clock-cells = <0>; > > > + clock-frequency = <100000000>; > > > + }; > > > + > > > pps { > > > compatible = "pps-gpio"; > > > pinctrl-names = "default"; > > > @@ -215,8 +222,8 @@ &gpio1 { > > > &gpio2 { > > > gpio-line-names = > > > "", "", "", "", "", "", "", "", > > > - "", "", "", "", "", "", "", "", > > > - "pcie3_wdis#", "", "", "pcie1_wdis@", "pcie2_wdis#", "", > > "", "", > > > + "", "", "", "", "", "", "pcie3_wdis#", "", > > > + "", "", "pcie2_wdis#", "", "", "", "", "", > > > "", "", "", "", "", "", "", ""; > > > }; > > > > > > @@ -562,6 +569,28 @@ &i2c4 { > > > status = "okay"; > > > }; > > > > > > +&pcie_phy { > > > + fsl,refclk-pad-mode = ; > > > + fsl,clkreq-unsupported; > > > + clocks = <&pcie0_refclk>; > > > + clock-names = "ref"; > > > + status = "okay"; > > > +}; > > > + > > > +&pcie { > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&pinctrl_pcie0>; > > > + reset-gpio = <&gpio2 17 GPIO_ACTIVE_LOW>; > > > + clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, > > > + <&clk IMX8MP_CLK_PCIE_ROOT>, > > > + <&clk IMX8MP_CLK_HSIO_AXI>; > > > + clock-names = "pcie", "pcie_aux", "pcie_bus"; > > > > With the still pending dt-binding patch at [1] the clock order shall be > > "pcie", "pcie_bus", "pcie_phy". > > > > Best regards, > > Alexander > > > > [1] https://lore.kernel.org/lkml/20220822184701.25246-2-Sergey.Semin@baikalelectronics.ru/ > > > > Alexander, > > Interesting... the imx8pm-evk PCIe patch was accepted with the > bindings I used which are current. So I suppose if/when the patch you > pointed to gets accepted some existing bindings will need to change to > be compliant. > > Best Regards, > > Tim Shawn, I'm unclear if this patch needs to change. I believe the patch adheres to the current bindings and if the bindings change it would require all the imx8m boards to have their bindings updated to agree with it. I'm also unclear if the order of the clocks really makes any difference here. Best Regards, Tim