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[2620:137:e000::1:20]) by mx.google.com with ESMTP id f21-20020a056402195500b00447a73226a8si13441648edz.612.2022.09.15.02.09.01; Thu, 15 Sep 2022 02:09:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=SpCm8zgK; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229970AbiIOIhg (ORCPT + 99 others); Thu, 15 Sep 2022 04:37:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230113AbiIOIhb (ORCPT ); Thu, 15 Sep 2022 04:37:31 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 37F0F97EDF; Thu, 15 Sep 2022 01:37:27 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 28F8av5d020223; Thu, 15 Sep 2022 03:36:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1663231017; bh=2RSmklK1TVuVRmWe/70Gpjzew728xNGbXx1E3M+lpr8=; h=Date:CC:Subject:To:References:From:In-Reply-To; b=SpCm8zgKOL/xH+6QYS9hvm1VYeoEBIuy1znTpdRovLDu9xZs7LUrdNrXbob4fdXYE SdUQxG0OXJlbZv1B1gn/bGHjyRvvaGYY1+DzyQ2Vn3cSqQURh8qKVmGMg2iCz5i/Cn hxHb3a4gfERI7btHXOlSmaP7o+0CY2r4WUuFZELk= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 28F8avuA055725 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 15 Sep 2022 03:36:57 -0500 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Thu, 15 Sep 2022 03:36:57 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Thu, 15 Sep 2022 03:36:57 -0500 Received: from [10.24.69.241] (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28F8alx3095898; Thu, 15 Sep 2022 03:36:47 -0500 Message-ID: Date: Thu, 15 Sep 2022 14:06:46 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 CC: , , , , , , , , , , , , , , , , Subject: Re: [PATCH 2/8] net: ethernet: ti: am65-cpsw: Add support for SERDES configuration Content-Language: en-US To: "Russell King (Oracle)" References: <20220914095053.189851-1-s-vadapalli@ti.com> <20220914095053.189851-3-s-vadapalli@ti.com> From: Siddharth Vadapalli In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A, RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello Russell, On 14/09/22 21:07, Russell King (Oracle) wrote: > On Wed, Sep 14, 2022 at 03:20:47PM +0530, Siddharth Vadapalli wrote: >> @@ -1427,6 +1471,9 @@ static void am65_cpsw_nuss_mac_link_down(struct phylink_config *config, unsigned >> struct net_device *ndev = port->ndev; >> int tmo; >> >> + /* disable phy */ >> + am65_cpsw_disable_phy(port->slave.ifphy); >> + > > This seems really strange. If you have a serdes interface which > presumably supports SGMII, 1000base-X etc, then link status is sent > across the serdes interface. If you power down the serdes, then you > can't receive the link status, and so mac_link_up() won't be called. > > Are you really sure you want to be enabling and disabling the PHY > in mac_link_down()/mac_link_up() ? Thank you for reviewing the patch. The PHY passed to the "am65_cpsw_disable_phy()" and "am65_cpsw_disable_phy()" functions within the "am65_cpsw_nuss_mac_link_down()" and "am65_cpsw_nuss_mac_link_up()" functions respectively, is the CPSW ethernet MAC's PHY and not the SERDES PHY. The SERDES PHY is powered on through the function call to the "am65_cpsw_init_phy()" function. The calls to the functions "am65_cpsw_enable_phy()" and "am65_cpsw_disable_phy()" within the "am65_cpsw_nuss_mac_link_up()" and "am65_cpsw_nuss_mac_link_down()" functions respectively, try to power on and power off the CPSW ethernet MAC's phy. Looking at it again,they do nothing, since the driver corresponding to the ethernet MAC's PHY which happens to be drivers/phy/ti/phy-gmii-sel.c, does not provide any methods to power on and power off the ethernet MAC's PHY. I have just realized that this is stale code and will remove it in the v2 series. Also, I realize now that I did not invoke "am65_cpsw_disable_phy()" on the SERDES PHY in the driver's remove function. I will fix this in the v2 series. Regards, Siddharth.