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Message-ID: <e15f3e2a-2761-84d9-c5c9-118717e0bb83@conchuod.ie>
Date:   Thu, 15 Sep 2022 23:40:34 +0100
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Subject: Re: [PATCH v3 07/10] riscv: boot: dts: r9a07g043: Add placeholder
 nodes
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To:     "Lad, Prabhakar" <prabhakar.csengg@gmail.com>,
        Conor.Dooley@microchip.com
Cc:     geert+renesas@glider.be, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, paul.walmsley@sifive.com,
        palmer@dabbelt.com, aou@eecs.berkeley.edu, heiko@sntech.de,
        atishp@rivosinc.com, devicetree@vger.kernel.org,
        linux-riscv@lists.infradead.org, linux-renesas-soc@vger.kernel.org,
        linux-kernel@vger.kernel.org, biju.das.jz@bp.renesas.com,
        prabhakar.mahadev-lad.rj@bp.renesas.com
References: <20220915181558.354737-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
 <20220915181558.354737-8-prabhakar.mahadev-lad.rj@bp.renesas.com>
 <3693a3a1-5a2a-4cc5-fb55-f6ad9a4b3f72@microchip.com>
 <CA+V-a8u87tqhC69qGD2zq_gT9jc_cSWd+NRn_u0bPTdmmk+j4A@mail.gmail.com>
From:   Conor Dooley <mail@conchuod.ie>
In-Reply-To: <CA+V-a8u87tqhC69qGD2zq_gT9jc_cSWd+NRn_u0bPTdmmk+j4A@mail.gmail.com>
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On 15/09/2022 23:26, Lad, Prabhakar wrote:
> Hi Conor,
> 
> Thank you for the review.
> 
> On Thu, Sep 15, 2022 at 10:36 PM <Conor.Dooley@microchip.com> wrote:
>>
>> On 15/09/2022 19:15, Prabhakar wrote:
>>> riscv: boot: dts: r9a07g043: Add placeholder nodes
>>
>> nit: s/boot//
>>
> Will fix that.
> 
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>>>
>>> Add empty placeholder nodes to RZ/Five (R9A07G043) SoC DTSI.
>>
>> Can you explain why do you need placeholder nodes for this and
>> cannot just directly include the other dtsis?
>>
> Since the RZ/G2UL SoC is ARM64 where it has a GIC and on RZ/Five SoC
> we have PLIC for interrupts. Also the interrupt numbering for RZ/Five
> SoC differs from RZ/G2UL SoC hence we are not directly using the
> RZ/G2UL SoC DTSI [0].
> 
> [0] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/renesas/r9a07g043.dtsi?h=v6.0-rc5
> 
> For the RZ/Five SMARC EVK I am re-using the below files [1] (SoM) and
> [2] (Carrier board) as the RZ/Five SMARC EVK is pin compatible.  Since
> I am re-using these when trying to compile the RZ/Five DTB I get
> compilation errors since the nodes dont exist (and there is no way
> currently we can delete the node reference when the actual node itself
> isn't present) hence these place holders.
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?h=v6.0-rc5
> [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi?h=v6.0-rc5


If this method is acceptable to Geert, this explanation 100% needs to
go into the commit message.

Thanks,
Conor.