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Received: from VI1PR04MB5005.eurprd04.prod.outlook.com (2603:10a6:803:57::30) by DU0PR04MB9417.eurprd04.prod.outlook.com (2603:10a6:10:358::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5612.22; Fri, 16 Sep 2022 10:36:52 +0000 Received: from VI1PR04MB5005.eurprd04.prod.outlook.com ([fe80::9466:d44b:804:72ef]) by VI1PR04MB5005.eurprd04.prod.outlook.com ([fe80::9466:d44b:804:72ef%5]) with mapi id 15.20.5632.016; Fri, 16 Sep 2022 10:36:52 +0000 Date: Fri, 16 Sep 2022 13:36:41 +0300 From: Viorel Suman To: Ahmad Fatoum Cc: Abel Vesa , Michael Turquette , Stephen Boyd , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Rob Herring , Krzysztof Kozlowski , Viorel Suman , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 1/2] dt-bindings: firmware: imx: sync with SCFW kit v1.13.0 Message-ID: <20220916103641.2xvwkqovnuh2ajm2@fsr-ub1664-116> References: <20220915181805.424670-1-viorel.suman@oss.nxp.com> <20220915181805.424670-2-viorel.suman@oss.nxp.com> <58e7eada-ce18-0135-210a-3bc27e849fd7@pengutronix.de> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?T8nxsq0gqLRUTxSk6vsdHvshABllE5CZqLfl3AnT+fDitWTNmijKDkFSs3/a?= =?us-ascii?Q?R35WA3UjgNVfrc4g5Cxfr6StYX6nYslcv0nk8mAnQPT7hybXt9Hp8OwXHrlm?= =?us-ascii?Q?pm59vzQIdW9xam7RSlhVz51hzVueTsU8rDQ4WY7WUl5CvZcYYv+FjaDQgfXl?= =?us-ascii?Q?OZKlIN9/Sgn2T+f44Vb1SLcAwFjeszXEAAWsAFyDHWHwJ1EOZ3Ei+LTJMTUl?= =?us-ascii?Q?VpCg+HCAlON81A3dfJ+yMEikSvN8fz0eAmcqc8XKCl0UhjAYBZc2Y5pGcyp0?= =?us-ascii?Q?4q2x/oBlSrp8pMqTAB068EwRLiuiTRCDvmZB4e+9DFPqRAHo/IXK3g1ViRSt?= =?us-ascii?Q?peXsg4v6ud8h1u2a1Hxdkiz5RVKzkAUgSRlUSosBy6GIdyXwUW5dpD90E8Pa?= =?us-ascii?Q?6iy6VtjFZn3f7OvVdYexnDgAusF2VdJmCp0woBOYXmNTeCu5yROISdOQXgPi?= =?us-ascii?Q?mIV9+9mDfLltSAHm9acwwjCVP/82JPV5Unl4ShpOD0p8DwXItfncU00Hj9/u?= =?us-ascii?Q?wGY/wYsLtiNtW6MIvAnaTIblig++OjvkOoUTI0Uat4VPKGdfNZa4ANlKO0BF?= =?us-ascii?Q?Z1loh6HMRZL5M6piNa2nsYIOiz7fNZ160EUqd9yp9iqbWqpAUD1dJ84HnTqg?= =?us-ascii?Q?zhFyWanIdHZPLUdbHy1a+2crubZvy06SGlYrNBY8MW1KxmEoS/3VM786I14H?= =?us-ascii?Q?BJeFZWIig1H/BS5tzXauze/S5OwPehhOlt3b/EBTTVrYWHuKFeAedRNhdPDf?= =?us-ascii?Q?lZhAOlzs02IW17uDH63EVVDw5Uf6QS/HoF9bWhVbRvnX7Y50g3G+pgiEMXOV?= =?us-ascii?Q?k8HU3hpbL+zv54jjEjZdsVC0/+dJhIwDTFy0Ff8DRY8mVQOyBEyFJPqjd1Ud?= =?us-ascii?Q?UfBn8mxJ6+vKHoCLOJS0YhfstIOM8ow2jZ1OBVoBpYoPo/B4HkkrDlQSTGBK?= =?us-ascii?Q?u4bC3qIy6A3MUOtmAPlp+Bp0nM+rkSrmxTJSCfZ23Iyq9eQUMMvw378I59ls?= =?us-ascii?Q?6H3vc9EwnFi7Hk7OqIjq7h19QjvVU3HeEElEFOc1UADohE3pCSN8bW1hsn1R?= =?us-ascii?Q?0TAgAEgW9ULUNZsNqjkxfabpppTTpp0PEGF+tb1VfQa3KhDsYwUSYfI0cKyp?= =?us-ascii?Q?ZqogtFRaN0MLQsYXGYEJmZEmKrA8rdUO/3UZ3ZxuLtXR67cumcMQFZ9wnMg1?= =?us-ascii?Q?yM+8/Vd79J9914DkvDjhYx63zafOhEGqmJX1LWATx/qLOO6w5V2QZc1by1fs?= =?us-ascii?Q?GY8p2XxieNC2ltvFE2wdIgQ6Sn1P3MwUXHKlrF9BRqa1KgJMA7xwWXB1swwm?= =?us-ascii?Q?KAdIsMwIN6nJbEwqgOKvZKO5pOJH6EGBez7xeWKs/KwhkdvaPc0MuMgoopJC?= =?us-ascii?Q?7808hky9rMB5GNjMMSmXmQmRTijxIlomUFPuBabO3libQxDPWBbaRTWujeov?= =?us-ascii?Q?PD3FoEta5OaUbTcqGRq0gHPV2WJQfHL7E/OZ6W1EDDAF6C8c8kZ0aOyepoR/?= =?us-ascii?Q?s3hK7YI4A6FH0oe8uV2dtCnT8uSj8mkxN8AV1XmC9CotiBaLvvZgcLt7loMx?= =?us-ascii?Q?N4lZa4xUkbNu3goZ2NdGw+f1ZoZlIVPAJ2Yq0ldJ?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: d6fe207b-720d-4b55-30a0-08da97cf5e20 X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5005.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Sep 2022 10:36:52.1569 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 4rBYOH9X99n+SvBD76EMZaz9/qUYRfNr+1QH3P1bJBVLNj8npAi5dIyl6dQESKGDgP4KuZFQxvFAJjIFkyXyyA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR04MB9417 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 22-09-16 09:43:51, Ahmad Fatoum wrote: > Hello, > > On 15.09.22 20:18, Viorel Suman (OSS) wrote: > > From: Viorel Suman > > > > Sync defines with the latest available SCFW kit version 1.13.0, > > may be found at the address below: > > > > https://www.nxp.com/webapp/Download?colCode=L5.15.32_2.0.0_SCFWKIT-1.13.0&appType=license > > > > Signed-off-by: Viorel Suman > > --- > > include/dt-bindings/firmware/imx/rsrc.h | 299 ++++++++++++++++-------- > > 1 file changed, 203 insertions(+), 96 deletions(-) > > > > diff --git a/include/dt-bindings/firmware/imx/rsrc.h b/include/dt-bindings/firmware/imx/rsrc.h > > index 43885056557c..a4c68f394986 100644 > > --- a/include/dt-bindings/firmware/imx/rsrc.h > > +++ b/include/dt-bindings/firmware/imx/rsrc.h > > @@ -13,34 +13,38 @@ > > * never be changed or removed (only added to at the end of the list). > > Above comment literally says that you should never remove defines below. > Please provide a better justification why you deem breaking DT backward > compatibility acceptable. > > Thanks, > Ahmad > > > */ > > > > -#define IMX_SC_R_A53 0 > > -#define IMX_SC_R_A53_0 1 > > -#define IMX_SC_R_A53_1 2 > > -#define IMX_SC_R_A53_2 3 > > -#define IMX_SC_R_A53_3 4 ... Hi Ahmad, The defines you mentioned are not removed, just redefined in the backward compatibility section added in the end of the patch. The patch follows the same approach as in SCFW kit v1.13.0, so it's much easier to synchronize them. +/* + * Compatibility defines for sc_rsrc_t + */ +#define IMX_SC_R_A35 IMX_SC_R_AP_2 +#define IMX_SC_R_A35_0 IMX_SC_R_AP_2_0 +#define IMX_SC_R_A35_1 IMX_SC_R_AP_2_1 +#define IMX_SC_R_A35_2 IMX_SC_R_AP_2_2 +#define IMX_SC_R_A35_3 IMX_SC_R_AP_2_3 +#define IMX_SC_R_A53 IMX_SC_R_AP_0 +#define IMX_SC_R_A53_0 IMX_SC_R_AP_0_0 +#define IMX_SC_R_A53_1 IMX_SC_R_AP_0_1 +#define IMX_SC_R_A53_2 IMX_SC_R_AP_0_2 +#define IMX_SC_R_A53_3 IMX_SC_R_AP_0_3 ... The only renamed defines are below, the reason is that VPU_UART and VPUCORE* defines were replaced with ENET defines in SCFW kit long time ago, to quote the author: "The VPU UARTs haven't existed since QM A0 was supported." > > -#define IMX_SC_R_VPU_UART 366 > > -#define IMX_SC_R_VPUCORE 367 > > -#define IMX_SC_R_VPUCORE_0 368 > > -#define IMX_SC_R_VPUCORE_1 369 > > -#define IMX_SC_R_VPUCORE_2 370 > > -#define IMX_SC_R_VPUCORE_3 371 > > +#define IMX_SC_R_ENET_0_A2 366 > > +#define IMX_SC_R_ENET_1_A0 367 > > +#define IMX_SC_R_ENET_1_A1 368 > > +#define IMX_SC_R_ENET_1_A2 369 > > +#define IMX_SC_R_ENET_1_A3 370 > > +#define IMX_SC_R_ENET_1_A4 371 Regards, Viorel