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[2620:137:e000::1:20]) by mx.google.com with ESMTP id j6-20020a056a00174600b0054576310f12si13845883pfc.366.2022.09.16.04.43.19; Fri, 16 Sep 2022 04:43:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=KnjNFnhc; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231328AbiIPL22 (ORCPT + 99 others); Fri, 16 Sep 2022 07:28:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231191AbiIPL1k (ORCPT ); Fri, 16 Sep 2022 07:27:40 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 41ADAA407D; Fri, 16 Sep 2022 04:27:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1663327660; x=1694863660; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YhYXviQLdmzZaww64eXm52VKSDr5s7UwTuPOh/Kuq5o=; b=KnjNFnhcOhaaYFsAhbv2e1cWDd+ohq0RQyTwhZKZmfmA+Hl3in8JJ6Yt 2ueoCajVOJCdau82lQpN+jTYVN642yRI+RnMFd3U83o4It6Czutt0NxmG 5vh7BT4qMY8Iv65GEMxPzJg6qFEcbq/wwJjy0BO/lXbQaW1cSq/B5Obxk qYy5TCJwmM9X2HRgFIIcxcsWLPtwgYNiYvDWeQZRbYBAna6LSkEMOyLaI FZXIHidZC+fLZjEzuqlrAZP9hTTBK4+8TkGrjwnGRJ9ExT5uXBSD3fEOi bz3icURpcX30nuY/3N1ZaIqjxgvjG4A30ENN0ktBm6H7iZy/SwAPT27cb A==; X-IronPort-AV: E=Sophos;i="5.93,320,1654585200"; d="scan'208";a="174187651" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 16 Sep 2022 04:27:38 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 16 Sep 2022 04:27:36 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 16 Sep 2022 04:27:34 -0700 From: Conor Dooley To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Daire McNamara , Shravan Chippa CC: Paul Walmsley , Palmer Dabbelt , Albert Ou , Cyril Jean , Lewis Hanly , Vattipalli Praveen , Wolfgang Grandegger , Hugh Breslin , , , Subject: [PATCH v5 08/10] riscv: dts: microchip: reduce the fic3 clock rate Date: Fri, 16 Sep 2022 12:26:44 +0100 Message-ID: <20220916112645.567794-9-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220916112645.567794-1-conor.dooley@microchip.com> References: <20220916112645.567794-1-conor.dooley@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org For the v2022.09 release of the reference design, the fic3 clock rate been reduced from 62.5 MHz to 50 MHz as it allows timing to be closed significantly more quickly by customers who chose to build the reference design themselves. Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi index 98f04be0dc6b..c2aac1a7e862 100644 --- a/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi @@ -30,7 +30,7 @@ i2c2: i2c@40000200 { fabric_clk3: fabric-clk3 { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <62500000>; + clock-frequency = <50000000>; }; fabric_clk1: fabric-clk1 { -- 2.36.1