Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Colin Foster <colin.foster@in-advantage.com>
To:     linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Cc:     Paolo Abeni <pabeni@redhat.com>, Jakub Kicinski <kuba@kernel.org>,
        Eric Dumazet <edumazet@google.com>,
        "David S. Miller" <davem@davemloft.net>,
        UNGLinuxDriver@microchip.com,
        Alexandre Belloni <alexandre.belloni@bootlin.com>,
        Claudiu Manoil <claudiu.manoil@nxp.com>,
        Vladimir Oltean <vladimir.oltean@nxp.com>
Subject: [PATCH v1 net-next 1/2] net: mscc: ocelot: utilize readx_poll_timeout() for chip reset
Date:   Fri, 16 Sep 2022 12:13:48 -0700
Message-Id: <20220916191349.1659269-2-colin.foster@in-advantage.com>
In-Reply-To: <20220916191349.1659269-1-colin.foster@in-advantage.com>
References: <20220916191349.1659269-1-colin.foster@in-advantage.com>
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?YjCzXdVLlkvA1jGqvK3JvpgBYwwudSLCOUTHsQQ4VL9DXbRmHVtCFsyXSG6s?=
 =?us-ascii?Q?zD+AeOe7TiuzvVQ/xU72rPWW9Im3LTxzHZEOZxznmu8D7ei0Ff9pJsdcCnzy?=
 =?us-ascii?Q?8sCFfrsk3hIYgPbhPlcTkf3w4eQCB7fGJ9Z4CW9VWZSWdHu6SPlj7xpJaqI5?=
 =?us-ascii?Q?nrv51idRtfEB8cvGncOXn0IbuyF0UbdFeTKyK6s39jhEXiqpfspo/AhV9kA7?=
 =?us-ascii?Q?oViUD/rzZuIuDvNwA5+VMtJhIAN1OX3zrLdpPY0q47ZMu64g6yQk/Ur3i4j+?=
 =?us-ascii?Q?sKDFrVviNHW9slY+DTP/+5L54vfayLj0ARRkmD2Js0Bci0PK3hDUn0yHPBfx?=
 =?us-ascii?Q?QbYobXxtG2JaufKlmr0OzVv/H4rhVR5js/n3UwAWc502bT+ADBFYjh/Kg5Fo?=
 =?us-ascii?Q?THirOqAZgDeRV+HoGmjbYe1TautPNFNESO7Uxej+PQ9aHUh3XDhrB/3kPlH4?=
 =?us-ascii?Q?XK++R5eRnmugd+a0Eqcd/ViWk5tnTvBSrzqns49rErUzARTX8nsBZaTT3vqm?=
 =?us-ascii?Q?whKBDviLofb3BEELwu1kjLKZABJXLiq8LIvyWqs7mKlPsdXSctgDk6PQdpUE?=
 =?us-ascii?Q?cj/lvtPK2zR+nZ/+mU+H7ATAf4s+Pgw67QiGTtDnxw1mt+DX2uf9HwCECc83?=
 =?us-ascii?Q?p+wtKaGHR5SWV8tui7Ip47CXnfu6dFQmBFx54vDo+NwarVTR2RNCoVbct82r?=
 =?us-ascii?Q?haeBgO3IZ7AE29BwHJ1RdWDWKGFZ0yNejallLgOSlunRsBl8Y+CXSG3yjfhU?=
 =?us-ascii?Q?8hzht8x9GJPOYzq+nOLI5prr0216ZUbcjI+bT9J6pmEqyhESdhpbFfcyyKTj?=
 =?us-ascii?Q?LovF1GJ6yLCLj0V2FHKKeES5naaloRu+A6MH8ZpXs6g9nL9vhNkeXo+bVmMH?=
 =?us-ascii?Q?liNo31gGD6Tz6VbfbY431IzWJDZbzXKyS0dP1M5pYjy6GVnCkK2R7wDs2d8X?=
 =?us-ascii?Q?8UcnqzBljjukTbg3aE8ZzUAqW6sTWHnnFwj8YA2GtYOCqrMQG3pLXucUohwr?=
 =?us-ascii?Q?kc35G8ZF/axRlK165KDAjS3JZmv8d1ehtSwkuglQO5ExXN/531QFc5q8PCNj?=
 =?us-ascii?Q?e9BP2fk/j521LN2QKq0R5LTRUNEzOhQUoxvaLh0hnUG1bq5ODvy8sBtoBOhh?=
 =?us-ascii?Q?1ElWkkT67sFykgBRf1eAghQ+6ptDkupcRxjihaZhphfkSilHQId706lQVlX2?=
 =?us-ascii?Q?7R0K/F/FKqxjI+boB09eE51cHrFFOrURe3m5tKzq2aBmNgi3KoVIij2gpKtd?=
 =?us-ascii?Q?arcCDtWzu2HdopRWtCawZCu+N1O9QEZybEq0yDcCGZaPAhPg8U8umvVrZWsf?=
 =?us-ascii?Q?9EjH4BlJIxf8ACHXmuiyw5T4O5eRDjJvg7PnSyuIBEJT7d39HQPO3pdZxtWG?=
 =?us-ascii?Q?JqzRm6hrXl0ZIs5+WMDicQEK5iGcX4DPFPvN9NCU2qoIf16dkqZ12Zx9gzVg?=
 =?us-ascii?Q?fiuczMp2+eRhIDPHg5rqz2rm3prkS8fdBb5tCbX3yqUZ9Y1tBNKBTMTlXBrf?=
 =?us-ascii?Q?uUytdxi4mco037sEuaGYqnHFTBga4QAKWVDmnKTvodNWlf2+IYlnOYZHDehx?=
 =?us-ascii?Q?50jwzmpYKqg0mOJOiT/7Kj4Cy8sRBDG1zam9w0p38Nm/u2L7X4hqYKn7vsPa?=
 =?us-ascii?Q?VCFTxTmQUZuwgInR8rpDm2M=3D?=
X-OriginatorOrg: in-advantage.com
X-MS-Exchange-CrossTenant-Network-Message-Id: df35bd9c-b11f-4e2e-a15e-08da98179cfc
X-MS-Exchange-CrossTenant-AuthSource: MWHPR1001MB2351.namprd10.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Sep 2022 19:14:01.3693
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 48e842ca-fbd8-4633-a79d-0c955a7d3aae
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: Oc4qf+GjUt2vq8eXGm4ALbR3ESGs+Pmv4DaJMP1PZLd7jIXwk7gBEyf2DyPnaNvUDXiU4Aw2+yBvmqzLS8HMrzu7uzMzXkHFcPhWWaLAE2M=
X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA2PR10MB4492
X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,
        DKIM_VALID,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS
        autolearn=ham autolearn_force=no version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on
        lindbergh.monkeyblade.net
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Clean up the reset code by utilizing readx_poll_timeout instead of a custom
loop.

Signed-off-by: Colin Foster <colin.foster@in-advantage.com>
---
 drivers/net/ethernet/mscc/ocelot_vsc7514.c | 32 ++++++++++++++++------
 1 file changed, 23 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ethernet/mscc/ocelot_vsc7514.c b/drivers/net/ethernet/mscc/ocelot_vsc7514.c
index ae42bbba5747..79b7af36b4f4 100644
--- a/drivers/net/ethernet/mscc/ocelot_vsc7514.c
+++ b/drivers/net/ethernet/mscc/ocelot_vsc7514.c
@@ -6,6 +6,7 @@
  */
 #include <linux/dsa/ocelot.h>
 #include <linux/interrupt.h>
+#include <linux/iopoll.h>
 #include <linux/module.h>
 #include <linux/of_net.h>
 #include <linux/netdevice.h>
@@ -25,6 +26,9 @@
 #define VSC7514_VCAP_POLICER_BASE			128
 #define VSC7514_VCAP_POLICER_MAX			191
 
+#define MEM_INIT_SLEEP_US				1000
+#define MEM_INIT_TIMEOUT_US				100000
+
 static const u32 *ocelot_regmap[TARGET_MAX] = {
 	[ANA] = vsc7514_ana_regmap,
 	[QS] = vsc7514_qs_regmap,
@@ -191,22 +195,32 @@ static const struct of_device_id mscc_ocelot_match[] = {
 };
 MODULE_DEVICE_TABLE(of, mscc_ocelot_match);
 
+static int ocelot_mem_init_status(struct ocelot *ocelot)
+{
+	unsigned int val;
+	int err;
+
+	err = regmap_field_read(ocelot->regfields[SYS_RESET_CFG_MEM_INIT],
+				&val);
+
+	return err ?: val;
+}
+
 static int ocelot_reset(struct ocelot *ocelot)
 {
-	int retries = 100;
+	int err;
 	u32 val;
 
 	regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_INIT], 1);
 	regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1);
 
-	do {
-		msleep(1);
-		regmap_field_read(ocelot->regfields[SYS_RESET_CFG_MEM_INIT],
-				  &val);
-	} while (val && --retries);
-
-	if (!retries)
-		return -ETIMEDOUT;
+	/* MEM_INIT is a self-clearing bit. Wait for it to be cleared (should be
+	 * 100us) before enabling the switch core.
+	 */
+	err = readx_poll_timeout(ocelot_mem_init_status, ocelot, val, !val,
+				 MEM_INIT_SLEEP_US, MEM_INIT_TIMEOUT_US);
+	if (IS_ERR_VALUE(err))
+		return err;
 
 	regmap_field_write(ocelot->regfields[SYS_RESET_CFG_MEM_ENA], 1);
 	regmap_field_write(ocelot->regfields[SYS_RESET_CFG_CORE_ENA], 1);
-- 
2.25.1