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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id q16-20020a194310000000b004946aef1814sm4570117lfa.137.2022.09.18.01.57.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 18 Sep 2022 01:57:24 -0700 (PDT) Message-ID: <83144092-42bf-c6f7-e5d0-3153388ad143@linaro.org> Date: Sun, 18 Sep 2022 09:57:23 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 Subject: Re: [PATCH v2 1/3] dt-bindings: pinctrl: qcom: add sdm670 pinctrl Content-Language: en-US To: Richard Acayan , linux-arm-msm@vger.kernel.org Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht References: <20220917210915.194840-1-mailingradian@gmail.com> <20220917210915.194840-2-mailingradian@gmail.com> From: Krzysztof Kozlowski In-Reply-To: <20220917210915.194840-2-mailingradian@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-5.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 17/09/2022 22:09, Richard Acayan wrote: > There is a new driver for the Snapdragon 670 TLMM (Top-Level Mode > Multiplexer). Document it. > > Adapted from qcom,sm6350-pinctrl.yaml in the same directory at > commit c09acbc499e8 ("dt-bindings: pinctrl: use pinctrl.yaml"). Thank you for your patch. There is something to discuss/improve. > > Signed-off-by: Richard Acayan > --- > .../bindings/pinctrl/qcom,sdm670-tlmm.yaml | 135 ++++++++++++++++++ > 1 file changed, 135 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml > > diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml > new file mode 100644 > index 000000000000..3b6c381a2148 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml > @@ -0,0 +1,135 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/qcom,sdm670-tlmm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Technologies, Inc. SDM670 TLMM block > + > +maintainers: > + - Richard Acayan > + > +description: | > + This binding describes the Top Level Mode Multiplexer (TLMM) block found > + in the SDM670 platform. > + > +allOf: > + - $ref: "pinctrl.yaml#" Drop quotes/ > + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# > + > +properties: > + compatible: > + const: qcom,sdm670-tlmm > + > + reg: > + maxItems: 1 > + > + interrupts: true > + interrupt-controller: true > + '#interrupt-cells': true > + gpio-controller: true > + gpio-reserved-ranges: true Add constraints (minItems: 1, maxItems: half of GPIOs rounded up, so 75 I guess) > + '#gpio-cells': true > + gpio-ranges: true > + wakeup-parent: true > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +patternProperties: > + '-state$': > + oneOf: > + - $ref: "#/$defs/qcom-sdm670-tlmm-state" > + - patternProperties: > + "-pins$": > + $ref: "#/$defs/qcom-sdm670-tlmm-state" > + additionalProperties: false > + > +$defs: > + qcom-sdm670-tlmm-state: > + type: object > + description: > + Pinctrl node's client devices use subnodes for desired pin configuration. > + Client device subnodes use below standard properties. > + > + properties: > + pins: > + description: > + List of gpio pins affected by the properties specified in this > + subnode. > + items: > + oneOf: > + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$" > + - enum: [ ufs_reset, sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, > + sdc2_clk, sdc2_cmd, sdc2_data ] > + minItems: 1 > + maxItems: 36 > + > + function: > + description: > + Specify the alternative function to be configured for the specified > + pins. > + > + enum: [ adsp_ext, agera_pll, atest_char, atest_tsens, atest_tsens2, atest_usb1, atest_usb10, > + atest_usb11, atest_usb12, atest_usb13, atest_usb2, atest_usb20, atest_usb21, > + atest_usb22, atest_usb23, cam_mclk, cci_async, cci_i2c, cci_timer0, cci_timer1, > + cci_timer2, cci_timer3, cci_timer4, copy_gp, copy_phase, dbg_out, ddr_bist, > + ddr_pxi0, ddr_pxi1, ddr_pxi2, ddr_pxi3, edp_hot, edp_lcd, gcc_gp1, gcc_gp2, gcc_gp3, > + gp_pdm0, gp_pdm1, gp_pdm2, gpio, gps_tx, jitter_bist, ldo_en, ldo_update, > + lpass_slimbus, m_voc, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, > + mss_lte, nav_pps, pa_indicator, pci_e0, pci_e1, phase_flag, pll_bist, pll_bypassnl, > + pll_reset, pri_mi2s, pri_mi2s_ws, prng_rosc, qdss_cti, qdss, qlink_enable, > + qlink_request, qua_mi2s, qup0, qup1, qup10, qup11, qup12, qup13, qup14, qup15, qup2, > + qup3, qup4, qup5, qup6, qup7, qup8, qup9, qup_l4, qup_l5, qup_l6, sdc4_clk, > + sdc4_cmd, sdc4_data, sd_write, sec_mi2s, ter_mi2s, tgu_ch0, tgu_ch1, tgu_ch2, > + tgu_ch3, tsif1_clk, tsif1_data, tsif1_en, tsif1_error, tsif1_sync, tsif2_clk, > + tsif2_data, tsif2_en, tsif2_error, tsif2_sync, uim1_clk, uim1_data, uim1_present, > + uim1_reset, uim2_clk, uim2_data, uim2_present, uim2_reset, uim_batt, usb_phy, vfr_1, > + vsense_trigger, wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1, wsa_clk, wsa_data, ] > + > + > + bias-disable: true > + bias-pull-down: true > + bias-pull-up: true > + drive-strength: true > + input-enable: true > + output-high: true > + output-low: true > + > + required: > + - pins > + > + allOf: > + - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state" > + - if: > + properties: > + pins: > + pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$" > + then: > + required: > + - function > + > + additionalProperties: false > + > +examples: > + - | > + #include > + pinctrl@3400000 { Use 4 spaces for example indentation. Best regards, Krzysztof