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From:   Biju Das <biju.das.jz@bp.renesas.com>
To:     Prabhakar <prabhakar.csengg@gmail.com>,
        Geert Uytterhoeven <geert+renesas@glider.be>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>
CC:     "linux-renesas-soc@vger.kernel.org" 
        <linux-renesas-soc@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: RE: [PATCH] clk: renesas: r9a07g044: Add WDT2 clocks to critical list
Thread-Topic: [PATCH] clk: renesas: r9a07g044: Add WDT2 clocks to critical
 list
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Date:   Mon, 19 Sep 2022 13:35:30 +0000
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Hi Prabhakar,

> Subject: [PATCH] clk: renesas: r9a07g044: Add WDT2 clocks to critical
> list
>=20
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>=20
> Add the WDT2 clocks to r9a07g044_crit_mod_clks[] list as WDT CH2 is
> specifically to check the operation of Cortex-M33 CPU on the RZ/{G2L,
> G2LC, V2L} SoCs and we dont want to turn off the clocks of
> WDT2 if it isn't enabled by Cortex-A55.
>=20
> This patch is in preparation to disable WDT CH2 from the RZ/G2L (alike
> SoCs) DTS/I by default.
>=20
> Reported-by: Biju Das <biju.das.jz@bp.renesas.com>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
>  drivers/clk/renesas/r9a07g044-cpg.c | 2 ++
>  1 file changed, 2 insertions(+)
>=20
> diff --git a/drivers/clk/renesas/r9a07g044-cpg.c
> b/drivers/clk/renesas/r9a07g044-cpg.c
> index 02a4fc41bb6e..cf9b1bd73792 100644
> --- a/drivers/clk/renesas/r9a07g044-cpg.c
> +++ b/drivers/clk/renesas/r9a07g044-cpg.c
> @@ -412,6 +412,8 @@ static const unsigned int
> r9a07g044_crit_mod_clks[] __initconst =3D {
>  	MOD_CLK_BASE + R9A07G044_GIC600_GICCLK,
>  	MOD_CLK_BASE + R9A07G044_IA55_CLK,
>  	MOD_CLK_BASE + R9A07G044_DMAC_ACLK,
> +	MOD_CLK_BASE + R9A07G044_WDT2_PCLK,
> +	MOD_CLK_BASE + R9A07G044_WDT2_CLK,

Do we need to turn on this clock unnecessarily?

Cheers,
Biju