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From:   Tim Harvey <tharvey@gateworks.com>
Date:   Mon, 19 Sep 2022 14:34:23 -0700
Message-ID: <CAJ+vNU3tV1NSNT8R-QNTxEhe+oxR=Fz9zHKGbf_MSBgr9dQ10g@mail.gmail.com>
Subject: Re: [PATCH v7 3/7] arm64: dts: imx8mp-evk: Add PCIe support
To:     Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc:     "vkoul@kernel.org" <vkoul@kernel.org>,
        "richard.leitner@linux.dev" <richard.leitner@linux.dev>,
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On Mon, Sep 19, 2022 at 8:22 AM Marcel Ziswiler
<marcel.ziswiler@toradex.com> wrote:
>
> Hi Richard et. al.
>
> Thank you very much for the i.MX 8MP PCIe support work.
>
> On Fri, 2022-09-02 at 16:58 +0800, Richard Zhu wrote:
> > Add PCIe support on i.MX8MP EVK board.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu-3arQi8VN3Tc@public.gmane.org>
> > Tested-by: Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
> > Tested-by: Richard Leitner <richard.leitner-WcANXNA0UjBBDgjK7y7TUQ@public.gmane.org>
> > Tested-by: Alexander Stein <alexander.stein-W3o+9BuWjQaZox4op4iWzw@public.gmane.org>
> > Reviewed-by: Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 53 ++++++++++++++++++++
> >  1 file changed, 53 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > index f6b017ab5f53..9f1469db554d 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > @@ -5,6 +5,7 @@
> >
> >  /dts-v1/;
> >
> > +#include <dt-bindings/phy/phy-imx8-pcie.h>
> >  #include "imx8mp.dtsi"
> >
> >  / {
> > @@ -33,6 +34,12 @@ memory@40000000 {
> >                       <0x1 0x00000000 0 0xc0000000>;
> >         };
> >
> > +       pcie0_refclk: pcie0-refclk {
> > +               compatible = "fixed-clock";
> > +                       #clock-cells = <0>;
> > +                       clock-frequency = <100000000>;
> > +       };
> > +
> >         reg_can1_stby: regulator-can1-stby {
> >                 compatible = "regulator-fixed";
> >                 regulator-name = "can1-stby";
> > @@ -55,6 +62,17 @@ reg_can2_stby: regulator-can2-stby {
> >                 enable-active-high;
> >         };
> >
> > +       reg_pcie0: regulator-pcie {
> > +               compatible = "regulator-fixed";
> > +               pinctrl-names = "default";
> > +               pinctrl-0 = <&pinctrl_pcie0_reg>;
> > +               regulator-name = "MPCIE_3V3";
> > +               regulator-min-microvolt = <3300000>;
> > +               regulator-max-microvolt = <3300000>;
> > +               gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>;
> > +               enable-active-high;
> > +       };
> > +
> >         reg_usdhc2_vmmc: regulator-usdhc2 {
> >                 compatible = "regulator-fixed";
> >                 pinctrl-names = "default";
> > @@ -350,6 +368,28 @@ &i2c5 {
> >          */
> >  };
> >
> > +&pcie_phy {
> > +       fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
>
> While this indeed works on the EVK so far I failed to get this to work on our Verdin iMX8M Plus which requires
> the fsl,refclk-pad-mode to be IMX8_PCIE_REFCLK_PAD_OUTPUT. It is not quite clear to me what kind of clocks I
> would need specifying in that case.
>
> Has anybody by any chance tried on any such HW design?
>
> For reference [1] on the Verdin iMX8M Mini the same works very well but the clocking seems rather different.
>

Marcel,

Do you have all the patches in Richard's series applied [1]? They got
picked up in different trees so make sure you have them all. I just
tested this series on top of 6.0-rc6 with imx8mp-venice-gw74xx and it
works fine. This board however does have IMX8_PCIE_REFCLK_PAD_INPUT.

Do you by chance have CLKREQ not hooked up? If so make sure you add a
'fsl,clkreq-unsupported' probe to pcie_phy.

Best Regards,

Tim
[1] https://patchwork.kernel.org/project/linux-pci/list/?series=673548&state=*