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Tue, 20 Sep 2022 00:52:06 -0500 Received: from xhdswatia40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.28 via Frontend Transport; Tue, 20 Sep 2022 00:52:01 -0500 From: Sarath Babu Naidu Gaddam To: , , , , CC: , , , , , , , , , , Subject: [RFC V3 PATCH 4/8] dmaengine: xilinx_dma: Increase AXI DMA transaction segment count Date: Tue, 20 Sep 2022 11:21:15 +0530 Message-ID: <20220920055119.12634-5-sarath.babu.naidu.gaddam@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220920055119.12634-1-sarath.babu.naidu.gaddam@amd.com> References: <20220920055119.12634-1-sarath.babu.naidu.gaddam@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT051:EE_|MW4PR12MB7215:EE_ X-MS-Office365-Filtering-Correlation-Id: 24cd9928-706f-4372-9bea-08da9acc4184 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: OBQ4jOII7Mw1MYS4m7Tu70695iouFbMrI6Z0wXeF9ucjSHj2f1DU2x0H6JpCdn7kuRRDLwcYGFAN7s4T9vCS/+DaKDOzqBox1cBsWcYpuegybRFRA+r+4dqRhvOgRsNfZLBWfwRk3eb5EyDx4qrTWELZPntr7gohQ+2wwGYVZGHQxaFTFcL/bzMlD1IRvtzqZfPxSnCVWSRUpp+fXFb58cWMFimIlQqv9hJ0FkMC80lSkwcC64roO2vEaN1SHhBTwNBussIzFEbEuGhVZ1yH0fCkSgcGc/0ybtJLFME6C4hJZRTuRiKEfzuY3ABz/ND2n8ym8S18MlC2Of9o/TQR9WbhHE9yrCTf60XVWgHc89Qiy/HQpxAltBEkRkOj5h0xze6BtcVMNurG0YKNiq8REZBbyT635pxMoChKZeVEJCdEoE9yaKvNeoaCskpa6yaq83bzs56d02482gDAQcEB0+lKih7xy72eXFR+8v9AFssfHH02DqnNYMIwEgwAVOTkRXnbE0CPYfHiawipw5PAecFwQbJhRyBrA+mCTZwLAEZAANd/WTp01wfW6kLJUzlhzqWcSEl11Qv0pxaug1f6qoegi1eAHOi0PxXMO+NqFEHn3UkYUt/oUPsNatBCtun8yX8wB0ipWk2kErk3FulLqFxaCvhGcPJj8Z8kB2qZKiHjOVBCrQoyaDzxxDtMNZFjiqOQvqaVZ2DAD73bekEZVEet5PxGB0ZysFNRuupMQwEnALq56tkOQye5Evrk4t8XAf5kfzwxDSekGvt2Aq/lOvl0kQZIVP+/V/PJJIEqbPmE72urZYpEVYKxBqaLEhoy X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(136003)(396003)(376002)(39860400002)(346002)(451199015)(46966006)(40470700004)(36840700001)(82740400003)(26005)(6666004)(54906003)(82310400005)(4326008)(1076003)(8676002)(5660300002)(70206006)(47076005)(40480700001)(478600001)(81166007)(2906002)(83380400001)(336012)(103116003)(70586007)(40460700003)(4744005)(186003)(36860700001)(41300700001)(110136005)(316002)(2616005)(8936002)(356005)(36756003)(86362001)(426003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Sep 2022 05:52:08.8468 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 24cd9928-706f-4372-9bea-08da9acc4184 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT051.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7215 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Radhey Shyam Pandey Increase AXI DMA transaction segments count to ensure that even in high load we always get a free segment in prepare descriptor for a DMA_SLAVE transaction. Signed-off-by: Radhey Shyam Pandey Signed-off-by: Sarath Babu Naidu Gaddam --- Changes in V3 and V2: - None --- drivers/dma/xilinx/xilinx_dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c index 12b1281b19bf..8c6065cbda79 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -178,7 +178,7 @@ #define XILINX_DMA_BD_SOP BIT(27) #define XILINX_DMA_BD_EOP BIT(26) #define XILINX_DMA_COALESCE_MAX 255 -#define XILINX_DMA_NUM_DESCS 255 +#define XILINX_DMA_NUM_DESCS 512 #define XILINX_DMA_NUM_APP_WORDS 5 /* AXI CDMA Specific Registers/Offsets */ -- 2.25.1